Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/vi.c vi_flush_hdp() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 1 reg 5408
PARAM_VALUE 2 val 1
BUF_SIZE 0 ring (-1),1360,85680,87040
BUF_SIZE 0 ring (-1),1360,85680,87040
DATA_SOURCE 0 ring $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &adev->pm.mutex
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &of->mutex

drivers/gpu/drm/amd/amdgpu/vi.c vi_invalidate_hdp() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 1 reg 3020
PARAM_VALUE 2 val 1
BUF_SIZE 0 ring (-1),1360,85680,87040
BUF_SIZE 0 ring (-1),1360,85680,87040
DATA_SOURCE 0 ring $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &adev->pm.mutex
HALF_LOCKED2 &adev->reset_domain->sem

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c gmc_v6_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c gmc_v6_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 1 reg 1310
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c amdgpu_hdp_generic_flush() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 1 reg 0-1073741823
PARAM_VALUE 2 val 0
BUF_SIZE 0 ring (-1),1360,85680,87040
BUF_SIZE 0 ring (-1),1360,85680,87040
DATA_SOURCE 0 ring $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &adev->pm.mutex
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &of->mutex

drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c hdp_v5_0_invalidate_hdp() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 2 val 1
BUF_SIZE 0 ring (-1),1360,85680,87040
BUF_SIZE 0 ring (-1),1360,85680,87040
DATA_SOURCE 0 ring $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &adev->pm.mutex
HALF_LOCKED2 &adev->reset_domain->sem

19f4aff6129bc862 gfx_v9_0_emit_wave_limit() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 2 val 31,134217727
DATA_SOURCE 0 ring $0
BIT_INFO 2 val 0x1f,0x7ffffff
NOCHECK_CALL

19f4aff6129bc862 gfx_v9_0_emit_wave_limit_cs() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->hw_prio 2
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 2 val 1,127
BUF_SIZE 0 ring (-1),1360,85680,87040
BUF_SIZE 0 ring (-1),1360,85680,87040
DATA_SOURCE 0 ring $0
BIT_INFO 2 val 0x1,0x7f
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

19f4aff6129bc862 gfx_v9_0_ring_preempt_ib() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->cond_exe_cpu_addr 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->ring 4096-ptr_max
PARAM_VALUE 2 val 0
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &attr->mutex
HALF_LOCKED2 &mux->lock

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c gmc_v12_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c gmc_v12_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c gmc_v12_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 0 ring->vm_hub 8
PARAM_VALUE 2 val 0
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c gmc_v12_0_emit_pasid_mapping() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 2 val $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c gfx_v9_4_3_emit_wave_limit() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 2 val 31,134217727
DATA_SOURCE 0 ring $0
BIT_INFO 2 val 0x1f,0x7ffffff
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c gfx_v9_4_3_emit_wave_limit_cs() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->hw_prio 2
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 2 val 1,127
BUF_SIZE 0 ring (-1),1360,85680,87040
BUF_SIZE 0 ring (-1),1360,85680,87040
DATA_SOURCE 0 ring $0
BIT_INFO 2 val 0x1,0x7f
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c hdp_v5_2_flush_hdp() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 1 reg 0-1073741823
PARAM_VALUE 2 val 0
BUF_SIZE 0 ring (-1),1360,85680,87040
BUF_SIZE 0 ring (-1),1360,85680,87040
DATA_SOURCE 0 ring $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &adev->pm.mutex
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &of->mutex

2424e8ec9bf51854 gfx_v12_0_update_spm_vmid() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u32max[c]
HALF_LOCKED2 &dqm->lock_hidden

28ad57647bf6154f gfx_v11_0_update_spm_vmid() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u32max
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 1 reg 1310
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_emit_pasid_mapping() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 2 val $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c amdgpu_ring_emit_reg_write_reg_wait_helper() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 2 val 8126464-8323071,16252928-16515071,150470656-150667263
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
CAPPED_DATA 2 val 1
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $1
DATA_SOURCE 2 val $3
BIT_INFO 2 val 0x780000,0xfffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c sdma_v7_0_ring_emit_reg_write_reg_wait() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 2 val 8126464-8323071,16252928-16515071,150470656-150667263
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
CAPPED_DATA 2 val 1
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $1
DATA_SOURCE 2 val $3
BIT_INFO 2 val 0x780000,0xfffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

3d756af95eb3bd31 gfx_v12_1_update_spm_vmid() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u32max[c]
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c hdp_v4_0_invalidate_hdp() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 2 val 1
BUF_SIZE 0 ring (-1),1360,85680,87040
BUF_SIZE 0 ring (-1),1360,85680,87040
DATA_SOURCE 0 ring $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &adev->pm.mutex
HALF_LOCKED2 &adev->reset_domain->sem

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c sdma_v7_1_ring_emit_reg_write_reg_wait() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 2 val 8126464-8323071,16252928-16515071,150470656-150667263
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
CAPPED_DATA 2 val 1
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $1
DATA_SOURCE 2 val $3
BIT_INFO 2 val 0x780000,0xfffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 0 ring->vm_hub 8
PARAM_VALUE 2 val 0
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_emit_pasid_mapping() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 2 val $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c sdma_v6_0_ring_emit_reg_write_reg_wait() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 2 val 8126464-8323071,16252928-16515071,150470656-150667263
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
CAPPED_DATA 2 val 1
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $1
DATA_SOURCE 2 val $3
BIT_INFO 2 val 0x780000,0xfffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c sdma_v6_0_ring_emit_vm_flush() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c sdma_v6_0_ring_emit_vm_flush() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c amdgpu_kiq_wreg() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
BUF_SIZE 0 ring 1264
DATA_SOURCE 1 reg $1
DATA_SOURCE 2 val $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u32max
USER_DATA 2 val 0-u32max[c]
LOCK2 &adev->reset_domain->sem
LOCK2 &kiq->ring_lock
LOCK2 flags
TYPE_LOCK (struct amdgpu_kiq)->ring_lock
TYPE_LOCK (struct amdgpu_reset_domain)->sem

drivers/gpu/drm/amd/amdgpu/si.c si_flush_hdp() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 1 reg 5408
PARAM_VALUE 2 val 1
BUF_SIZE 0 ring (-1),1360,85680,87040
BUF_SIZE 0 ring (-1),1360,85680,87040
DATA_SOURCE 0 ring $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &adev->pm.mutex
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &of->mutex

drivers/gpu/drm/amd/amdgpu/si.c si_invalidate_hdp() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 1 reg 3020
PARAM_VALUE 2 val 1
BUF_SIZE 0 ring (-1),1360,85680,87040
BUF_SIZE 0 ring (-1),1360,85680,87040
DATA_SOURCE 0 ring $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &adev->pm.mutex
HALF_LOCKED2 &adev->reset_domain->sem

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gmc_v9_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gmc_v9_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gmc_v9_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 0 ring->vm_hub 8,12
PARAM_VALUE 2 val 0
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gmc_v9_0_emit_pasid_mapping() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 0 ring->vm_hub 0-11,13-u32max
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 2 val $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/cik.c cik_flush_hdp() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 1 reg 5408
PARAM_VALUE 2 val 1
BUF_SIZE 0 ring (-1),1360,85680,87040
BUF_SIZE 0 ring (-1),1360,85680,87040
DATA_SOURCE 0 ring $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &adev->pm.mutex
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &of->mutex

drivers/gpu/drm/amd/amdgpu/cik.c cik_invalidate_hdp() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 1 reg 3020
PARAM_VALUE 2 val 1
BUF_SIZE 0 ring (-1),1360,85680,87040
BUF_SIZE 0 ring (-1),1360,85680,87040
DATA_SOURCE 0 ring $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &adev->pm.mutex
HALF_LOCKED2 &adev->reset_domain->sem

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_emit_wave_limit() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 1 reg 12743
PARAM_VALUE 2 val 31,134217727
DATA_SOURCE 0 ring $0
BIT_INFO 2 val 0x1f,0x7ffffff
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_emit_wave_limit_cs() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->hw_prio 2
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 1 reg 12745-12748
PARAM_VALUE 2 val 1,127
BUF_SIZE 0 ring (-1),1360,85680,87040
BUF_SIZE 0 ring (-1),1360,85680,87040
DATA_SOURCE 0 ring $0
BIT_INFO 1 reg 0x31c8,0x31cf
BIT_INFO 2 val 0x1,0x7f
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 1 reg 1310
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_emit_pasid_mapping() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 2 val $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c gmc_v11_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c gmc_v11_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c gmc_v11_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 0 ring->vm_hub 8
PARAM_VALUE 2 val 0
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c gmc_v11_0_emit_pasid_mapping() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 2 val $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c sdma_v5_2_ring_emit_reg_write_reg_wait() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 2 val 8126464-8323071,16252928-16515071,150470656-150667263
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
CAPPED_DATA 2 val 1
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $1
DATA_SOURCE 2 val $3
BIT_INFO 2 val 0x780000,0xfffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c sdma_v5_2_ring_emit_vm_flush() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c sdma_v5_2_ring_emit_vm_flush() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c gmc_v12_1_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c gmc_v12_1_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c gmc_v12_1_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 0 ring->vm_hub 8-u32max
PARAM_VALUE 2 val 0
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c gmc_v12_1_emit_pasid_mapping() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 2 val $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_ring_emit_reg_write_reg_wait() -> (struct amdgpu_ring_funcs)->emit_wreg()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 2 val 8126464-8323071,16252928-16515071,150470656-150667263
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
CAPPED_DATA 2 val 1
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $1
DATA_SOURCE 2 val $3
BIT_INFO 2 val 0x780000,0xfffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags