Open Menu /

Documented in 1 files:

Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/radeon/radeon_ring.c radeon_debugfs_ring_info_show() -> (struct radeon_asic_ring)->get_rptr()

Type Parameter Key Value
PARAM_VALUE 0 rdev 4096-ptr_max
PARAM_VALUE 0 rdev->asic 4096-ptr_max
PARAM_VALUE 1 ring 4096-ptr_max
PARAM_VALUE 1 ring->last_activity.counter 4294892296-23062724984436
PARAM_VALUE 1 ring->rdev 4096-ptr_max
BUF_SIZE 1 ring s32min-(-2),1-s32max
BUF_SIZE 1 ring s32min-(-2),1-s32max
RX_PATH
TASK_NOT_RUNNING
LOCK2 &m->lock
TYPE_LOCK (struct seq_file)->lock

drivers/gpu/drm/radeon/radeon_ring.c radeon_ring_free_size() -> (struct radeon_asic_ring)->get_rptr()

Type Parameter Key Value
PARAM_VALUE 0 rdev 4096-ptr_max
PARAM_VALUE 0 rdev->asic 4096-ptr_max
PARAM_VALUE 1 ring 4096-ptr_max
BUF_SIZE 0 rdev s32min-(-1),1-s32max
BUF_SIZE 0 rdev s32min-(-1),1-s32max
BUF_SIZE 0 rdev->agp (-1),144
BUF_SIZE 1 ring s32min-(-1),1-s32max
BUF_SIZE 1 ring s32min-(-1),1-s32max
DATA_SOURCE 0 rdev $0
DATA_SOURCE 1 ring $1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 rdev->config.cik.tile_config 0-16383[c]
HOST_DATA 0 rdev->config.r100.hdp_cntl 0-u32max
HOST_DATA 0 rdev->config.r300.hdp_cntl 0-u32max
HOST_DATA 0 rdev->config.r600.backend_map 0-3[c]
HOST_DATA 0 rdev->config.r600.tile_config 0-262143[c]
HOST_DATA 0 rdev->config.rv770.tile_config 0,2048-u32max[c]
HOST_DATA 0 rdev->gart.num_cpu_pages 0-524287[c]
HOST_DATA 0 rdev->irq.stat_regs.cik.d1grph_int 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.d2grph_int 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.d3grph_int 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.d4grph_int 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.d5grph_int 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.d6grph_int 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.disp_int 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.disp_int_cont 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.disp_int_cont2 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.disp_int_cont3 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.disp_int_cont4 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.disp_int_cont5 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.disp_int_cont6 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.r500.disp_int 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.r500.hdmi0_status 0,268435456
HOST_DATA 0 rdev->mc.aper_base 0-1099511627775
HOST_DATA 0 rdev->mc.gtt_size 0-s32max[c]
HOST_DATA 0 rdev->mc.gtt_start 0-u64max[c]
HOST_DATA 0 rdev->mc.mc_vram_size 0-4503599626321920
HOST_DATA 0 rdev->mc.real_vram_size 0-4503599626321920
HOST_DATA 0 rdev->mc.vram_end 0-9223372039002259453,u64max[c]
HOST_DATA 0 rdev->mc.vram_start 0-9223372036854775807[c]
HOST_DATA 0 rdev->num_gb_pipes 2-4[c]
NO_OVERFLOW_SIMPLE 0 rdev->rmmio_size
HALF_LOCKED2 &m->lock
HALF_LOCKED2 &rdev->ring_lock

drivers/gpu/drm/radeon/radeon_ring.c radeon_ring_lockup_update() -> (struct radeon_asic_ring)->get_rptr()

Type Parameter Key Value
PARAM_VALUE 0 rdev 4096-ptr_max
PARAM_VALUE 0 rdev->asic 4096-ptr_max
PARAM_VALUE 1 ring 4096-ptr_max
BUF_SIZE 0 rdev s32min-(-1),1-s32max
BUF_SIZE 0 rdev s32min-(-1),1-s32max
BUF_SIZE 0 rdev->agp (-1),144
BUF_SIZE 1 ring s32min-(-1),1-s32max
BUF_SIZE 1 ring s32min-(-1),1-s32max
DATA_SOURCE 0 rdev $0
DATA_SOURCE 1 ring $1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 rdev->config.cik.tile_config 0-16383[c]
HOST_DATA 0 rdev->config.r100.hdp_cntl 0-u32max
HOST_DATA 0 rdev->config.r300.hdp_cntl 0-u32max
HOST_DATA 0 rdev->config.r600.backend_map 0-3[c]
HOST_DATA 0 rdev->config.r600.tile_config 0-262143[c]
HOST_DATA 0 rdev->config.rv770.tile_config 0,2048-u32max[c]
HOST_DATA 0 rdev->gart.num_cpu_pages 0-524287[c]
HOST_DATA 0 rdev->irq.stat_regs.cik.d1grph_int 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.d2grph_int 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.d3grph_int 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.d4grph_int 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.d5grph_int 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.d6grph_int 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.disp_int 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.disp_int_cont 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.disp_int_cont2 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.disp_int_cont3 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.disp_int_cont4 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.disp_int_cont5 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.cik.disp_int_cont6 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.r500.disp_int 0-u32max
HOST_DATA 0 rdev->irq.stat_regs.r500.hdmi0_status 0,268435456
HOST_DATA 0 rdev->mc.aper_base 0-1099511627775
HOST_DATA 0 rdev->mc.gtt_size 0-s32max[c]
HOST_DATA 0 rdev->mc.gtt_start 0-u64max[c]
HOST_DATA 0 rdev->mc.mc_vram_size 0-4503599626321920
HOST_DATA 0 rdev->mc.real_vram_size 0-4503599626321920
HOST_DATA 0 rdev->mc.vram_end 0-9223372039002259453,u64max[c]
HOST_DATA 0 rdev->mc.vram_start 0-9223372036854775807[c]
HOST_DATA 0 rdev->num_gb_pipes 2-4[c]
HALF_LOCKED2 &rdev->exclusive_lock

drivers/gpu/drm/radeon/radeon_ring.c radeon_ring_test_lockup() -> (struct radeon_asic_ring)->get_rptr()

Type Parameter Key Value
PARAM_VALUE 0 rdev 4096-ptr_max
PARAM_VALUE 0 rdev->asic 4096-ptr_max
PARAM_VALUE 1 ring 4096-ptr_max
DATA_SOURCE 0 rdev $0
DATA_SOURCE 1 ring $1
LOCK2 &rdev->exclusive_lock
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct radeon_device)->exclusive_lock