Documented in 1 files:
Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 1 files:
Smatch caller information:
drivers/gpu/drm/radeon/r600_dma.c r600_dma_resume() -> (struct radeon_asic_ring)->ring_test()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->accel_working | 1 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 35-49 |
| PARAM_VALUE | 0 | rdev->gart.num_gpu_pages | 0-s32max |
| PARAM_VALUE | 0 | rdev->gart.ptr | 1-u64max |
| PARAM_VALUE | 0 | rdev->gart.ready | 1 |
| PARAM_VALUE | 0 | rdev->ih.ring | 1-u64max |
| PARAM_VALUE | 0 | rdev->ih.ring_obj | 1-u64max |
| PARAM_VALUE | 0 | rdev->irq.installed | 1 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->rlc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->usec_timeout | s32min-(-1),1-s32max |
| PARAM_VALUE | 0 | rdev->vram_scratch.ptr | 1-u64max |
| PARAM_VALUE | 0 | rdev->vram_scratch.robj | 1-u64max |
| PARAM_VALUE | 0 | rdev->wb.wb | 1-u64max |
| PARAM_VALUE | 0 | rdev->wb.wb_obj | 1-u64max |
| PARAM_VALUE | 1 | ring | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->ready | 1 |
| PARAM_VALUE | 1 | ring->wptr | 0 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| BUF_SIZE | 0 | rdev->rlc.cs_data | (-1),64 |
| BUF_SIZE | 0 | rdev->rlc.reg_list | (-1),324 |
| BUF_SIZE | 1 | ring | 800 |
| BUF_SIZE | 1 | ring | 800 |
| CAPPED_DATA | 0 | rdev->gart.num_gpu_pages | 1 |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->scratch.num_reg | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 1-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states |
drivers/gpu/drm/radeon/cik.c cik_cp_compute_resume() -> (struct radeon_asic_ring)->ring_test()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->accel_working | 1 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ce_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->config.cik.backend_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->config.cik.max_backends_per_se | 1-2,4 |
| PARAM_VALUE | 0 | rdev->config.cik.max_cu_per_sh | 2,7-8,11 |
| PARAM_VALUE | 0 | rdev->config.cik.max_gprs | 256 |
| PARAM_VALUE | 0 | rdev->config.cik.max_gs_threads | 16,32 |
| PARAM_VALUE | 0 | rdev->config.cik.max_hw_contexts | 8 |
| PARAM_VALUE | 0 | rdev->config.cik.max_sh_per_se | 1 |
| PARAM_VALUE | 0 | rdev->config.cik.max_shader_engines | 1-2,4 |
| PARAM_VALUE | 0 | rdev->config.cik.max_texture_channel_caches | 2,4,16 |
| PARAM_VALUE | 0 | rdev->config.cik.max_tile_pipes | 2,4,16 |
| PARAM_VALUE | 0 | rdev->config.cik.mem_max_burst_length_bytes | 256 |
| PARAM_VALUE | 0 | rdev->config.cik.mem_row_size_in_kb | 1-2,4 |
| PARAM_VALUE | 0 | rdev->config.cik.multi_gpu_tile_size | 64 |
| PARAM_VALUE | 0 | rdev->config.cik.num_gpus | 1 |
| PARAM_VALUE | 0 | rdev->config.cik.num_tile_pipes | 2,4 |
| PARAM_VALUE | 0 | rdev->config.cik.sc_earlyz_tile_fifo_size | 304 |
| PARAM_VALUE | 0 | rdev->config.cik.sc_hiz_tile_fifo_size | 48 |
| PARAM_VALUE | 0 | rdev->config.cik.sc_prim_fifo_size_backend | 256 |
| PARAM_VALUE | 0 | rdev->config.cik.sc_prim_fifo_size_frontend | 32 |
| PARAM_VALUE | 0 | rdev->config.cik.shader_engine_tile_size | 32 |
| PARAM_VALUE | 0 | rdev->config.cik.tile_config | 0-16383 |
| PARAM_VALUE | 0 | rdev->family | 57-61 |
| PARAM_VALUE | 0 | rdev->me_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mec.num_mec | 1-2 |
| PARAM_VALUE | 0 | rdev->mec.num_pipe | 4 |
| PARAM_VALUE | 0 | rdev->mec.num_queue | 32-64 |
| PARAM_VALUE | 0 | rdev->mec_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pfp_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->rlc.cp_table_size | 67584 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data | 6736858177102118912 |
| PARAM_VALUE | 0 | rdev->srbm_mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->srbm_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->usec_timeout | s32min-(-1),1-s32max |
| PARAM_VALUE | 1 | ring | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->ready | 1 |
| PARAM_VALUE | 1 | ring->wptr | 0 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| BUF_SIZE | 0 | rdev->rlc.cs_data | 32 |
| BUF_SIZE | 0 | rdev->rlc.reg_list | (-1),1284,1772 |
| CAPPED_DATA | 0 | rdev->config.cik.max_cu_per_sh | 1 |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->scratch.num_reg | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| CAPPED_DATA | 0 | &rdev->srbm_mutex | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states |
drivers/gpu/drm/radeon/cik.c cik_cp_gfx_resume() -> (struct radeon_asic_ring)->ring_test()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->accel_working | 1 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ce_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->config.cik.backend_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->config.cik.max_backends_per_se | 1-2,4 |
| PARAM_VALUE | 0 | rdev->config.cik.max_cu_per_sh | 2,7-8,11 |
| PARAM_VALUE | 0 | rdev->config.cik.max_gprs | 256 |
| PARAM_VALUE | 0 | rdev->config.cik.max_gs_threads | 16,32 |
| PARAM_VALUE | 0 | rdev->config.cik.max_hw_contexts | 8 |
| PARAM_VALUE | 0 | rdev->config.cik.max_sh_per_se | 1 |
| PARAM_VALUE | 0 | rdev->config.cik.max_shader_engines | 1-2,4 |
| PARAM_VALUE | 0 | rdev->config.cik.max_texture_channel_caches | 2,4,16 |
| PARAM_VALUE | 0 | rdev->config.cik.max_tile_pipes | 2,4,16 |
| PARAM_VALUE | 0 | rdev->config.cik.mem_max_burst_length_bytes | 256 |
| PARAM_VALUE | 0 | rdev->config.cik.mem_row_size_in_kb | 1-2,4 |
| PARAM_VALUE | 0 | rdev->config.cik.multi_gpu_tile_size | 64 |
| PARAM_VALUE | 0 | rdev->config.cik.num_gpus | 1 |
| PARAM_VALUE | 0 | rdev->config.cik.num_tile_pipes | 2,4 |
| PARAM_VALUE | 0 | rdev->config.cik.sc_earlyz_tile_fifo_size | 304 |
| PARAM_VALUE | 0 | rdev->config.cik.sc_hiz_tile_fifo_size | 48 |
| PARAM_VALUE | 0 | rdev->config.cik.sc_prim_fifo_size_backend | 256 |
| PARAM_VALUE | 0 | rdev->config.cik.sc_prim_fifo_size_frontend | 32 |
| PARAM_VALUE | 0 | rdev->config.cik.shader_engine_tile_size | 32 |
| PARAM_VALUE | 0 | rdev->config.cik.tile_config | 0-16383 |
| PARAM_VALUE | 0 | rdev->family | 57-61 |
| PARAM_VALUE | 0 | rdev->me_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mec.num_mec | 1-2 |
| PARAM_VALUE | 0 | rdev->mec.num_pipe | 4 |
| PARAM_VALUE | 0 | rdev->mec.num_queue | 32-64 |
| PARAM_VALUE | 0 | rdev->mec_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pfp_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->rlc.cp_table_size | 67584 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data | 6736858177102118912 |
| PARAM_VALUE | 0 | rdev->usec_timeout | s32min-(-1),1-s32max |
| PARAM_VALUE | 1 | ring | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->ready | 1 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| BUF_SIZE | 0 | rdev->rlc.cs_data | 32 |
| BUF_SIZE | 0 | rdev->rlc.reg_list | (-1),1284,1772 |
| BUF_SIZE | 1 | ring | 1280 |
| CAPPED_DATA | 0 | rdev->config.cik.max_cu_per_sh | 1 |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->scratch.num_reg | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states |
drivers/gpu/drm/radeon/uvd_v1_0.c uvd_v1_0_init() -> (struct radeon_asic_ring)->ring_test()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->accel_working | 1 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->has_uvd | 1 |
| PARAM_VALUE | 0 | rdev->usec_timeout | s32min-(-1),1-s32max |
| PARAM_VALUE | 1 | ring | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->ready | 1 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| BUF_SIZE | 0 | rdev->rlc.cs_data | (-1),32,64 |
| BUF_SIZE | 0 | rdev->rlc.reg_list | (-1),324,488,872,1284,1772 |
| BUF_SIZE | 1 | ring | 480 |
| BUF_SIZE | 1 | ring | 480 |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->scratch.num_reg | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states |
drivers/gpu/drm/radeon/ni_dma.c cayman_dma_resume() -> (struct radeon_asic_ring)->ring_test()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->accel_working | 1 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 50-56 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->usec_timeout | s32min-(-1),1-s32max |
| PARAM_VALUE | 1 | ring | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->ready | 1 |
| PARAM_VALUE | 1 | ring->wptr | 0 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| BUF_SIZE | 0 | rdev->rlc.cs_data | (-1),32,64 |
| BUF_SIZE | 0 | rdev->rlc.reg_list | (-1),488,872 |
| BUF_SIZE | 1 | ring | 640,800 |
| BUF_SIZE | 1 | ring | 640,800 |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->scratch.num_reg | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920[c] |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920[c] |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states |
drivers/gpu/drm/radeon/vce_v1_0.c vce_v1_0_init() -> (struct radeon_asic_ring)->ring_test()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->accel_working | 1 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 50-61 |
| PARAM_VALUE | 0 | rdev->has_vce | 1 |
| PARAM_VALUE | 0 | rdev->pdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->usec_timeout | s32min-(-1),1-s32max |
| PARAM_VALUE | 1 | ring | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->ready | 1 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| BUF_SIZE | 0 | rdev->rlc.cs_data | (-1),32,64 |
| BUF_SIZE | 0 | rdev->rlc.reg_list | (-1),488,872,1284,1772 |
| BUF_SIZE | 1 | ring | 320 |
| BUF_SIZE | 1 | ring | 320 |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->scratch.num_reg | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states |
drivers/gpu/drm/radeon/vce_v1_0.c vce_v1_0_init() -> (struct radeon_asic_ring)->ring_test()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->accel_working | 1 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 50-61 |
| PARAM_VALUE | 0 | rdev->has_vce | 1 |
| PARAM_VALUE | 0 | rdev->pdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->usec_timeout | s32min-(-1),1-s32max |
| PARAM_VALUE | 1 | ring | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->ready | 1 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| BUF_SIZE | 0 | rdev->rlc.cs_data | (-1),32,64 |
| BUF_SIZE | 0 | rdev->rlc.reg_list | (-1),488,872,1284,1772 |
| BUF_SIZE | 1 | ring | 160 |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->scratch.num_reg | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states |
drivers/gpu/drm/radeon/r600.c r600_cp_resume() -> (struct radeon_asic_ring)->ring_test()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->accel_working | 1 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->dev | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->gart.num_gpu_pages | 0-s32max |
| PARAM_VALUE | 0 | rdev->gart.ptr | 1-u64max |
| PARAM_VALUE | 0 | rdev->gart.ready | 1 |
| PARAM_VALUE | 0 | rdev->ih.ring | 1-u64max |
| PARAM_VALUE | 0 | rdev->ih.ring_obj | 1-u64max |
| PARAM_VALUE | 0 | rdev->irq.installed | 1 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->rlc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->usec_timeout | s32min-(-1),1-s32max |
| PARAM_VALUE | 0 | rdev->vram_scratch.ptr | 1-u64max |
| PARAM_VALUE | 0 | rdev->vram_scratch.robj | 1-u64max |
| PARAM_VALUE | 0 | rdev->wb.wb | 1-u64max |
| PARAM_VALUE | 0 | rdev->wb.wb_obj | 1-u64max |
| PARAM_VALUE | 1 | ring | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->ready | 1 |
| PARAM_VALUE | 1 | ring->wptr | 0 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| BUF_SIZE | 1 | ring | 1280 |
| BUF_SIZE | 1 | ring | 1280 |
| CAPPED_DATA | 0 | rdev->gart.num_gpu_pages | 1 |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->scratch.num_reg | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 1-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states |
drivers/gpu/drm/radeon/evergreen.c evergreen_cp_resume() -> (struct radeon_asic_ring)->ring_test()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->accel_working | 1 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->config.evergreen.max_backends | 1-2,4,8 |
| PARAM_VALUE | 0 | rdev->config.evergreen.max_gprs | 256 |
| PARAM_VALUE | 0 | rdev->config.evergreen.max_gs_threads | 16,32 |
| PARAM_VALUE | 0 | rdev->config.evergreen.max_hw_contexts | 4,8 |
| PARAM_VALUE | 0 | rdev->config.evergreen.max_pipes | 2,4 |
| PARAM_VALUE | 0 | rdev->config.evergreen.max_simds | 2-7,10 |
| PARAM_VALUE | 0 | rdev->config.evergreen.max_stack_entries | 256,512 |
| PARAM_VALUE | 0 | rdev->config.evergreen.max_threads | 192,248 |
| PARAM_VALUE | 0 | rdev->config.evergreen.max_tile_pipes | 2,4,8 |
| PARAM_VALUE | 0 | rdev->config.evergreen.num_ses | 1-2 |
| PARAM_VALUE | 0 | rdev->config.evergreen.sc_earlyz_tile_fifo_size | 304 |
| PARAM_VALUE | 0 | rdev->config.evergreen.sc_hiz_tile_fifo_size | 48 |
| PARAM_VALUE | 0 | rdev->config.evergreen.sc_prim_fifo_size | 64,256 |
| PARAM_VALUE | 0 | rdev->config.evergreen.sq_num_cf_insts | 1-2 |
| PARAM_VALUE | 0 | rdev->config.evergreen.sx_max_export_pos_size | 32,64 |
| PARAM_VALUE | 0 | rdev->config.evergreen.sx_max_export_size | 128,256 |
| PARAM_VALUE | 0 | rdev->config.evergreen.sx_max_export_smx_size | 96,192 |
| PARAM_VALUE | 0 | rdev->config.evergreen.sx_num_of_sets | 4 |
| PARAM_VALUE | 0 | rdev->config.evergreen.tile_config | 0-3,16-19,32-35 |
| PARAM_VALUE | 0 | rdev->family | 39-49 |
| PARAM_VALUE | 0 | rdev->gart.num_gpu_pages | 0-s32max |
| PARAM_VALUE | 0 | rdev->gart.ptr | 1-u64max |
| PARAM_VALUE | 0 | rdev->gart.ready | 1 |
| PARAM_VALUE | 0 | rdev->ih.ring | 1-u64max |
| PARAM_VALUE | 0 | rdev->ih.ring_obj | 1-u64max |
| PARAM_VALUE | 0 | rdev->irq.installed | 1 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->rlc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->usec_timeout | s32min-(-1),1-s32max |
| PARAM_VALUE | 0 | rdev->vram_scratch.ptr | 1-u64max |
| PARAM_VALUE | 0 | rdev->vram_scratch.robj | 1-u64max |
| PARAM_VALUE | 0 | rdev->wb.wb | 1-u64max |
| PARAM_VALUE | 0 | rdev->wb.wb_obj | 1-u64max |
| PARAM_VALUE | 1 | ring | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->ready | 1 |
| PARAM_VALUE | 1 | ring->wptr | 0 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| BUF_SIZE | 0 | rdev->rlc.cs_data | (-1),64 |
| BUF_SIZE | 0 | rdev->rlc.reg_list | (-1),324 |
| BUF_SIZE | 1 | ring | 1280 |
| BUF_SIZE | 1 | ring | 1280 |
| CAPPED_DATA | 0 | rdev->gart.num_gpu_pages | 1 |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->scratch.num_reg | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 1-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states |
drivers/gpu/drm/radeon/si.c si_cp_resume() -> (struct radeon_asic_ring)->ring_test()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->accel_working | 1 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->config.si.backend_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->config.si.max_backends_per_se | 1-2,4 |
| PARAM_VALUE | 0 | rdev->config.si.max_cu_per_sh | 5-6,8 |
| PARAM_VALUE | 0 | rdev->config.si.max_gprs | 256 |
| PARAM_VALUE | 0 | rdev->config.si.max_gs_threads | 16,32 |
| PARAM_VALUE | 0 | rdev->config.si.max_hw_contexts | 8 |
| PARAM_VALUE | 0 | rdev->config.si.max_sh_per_se | 1-2 |
| PARAM_VALUE | 0 | rdev->config.si.max_shader_engines | 1-2 |
| PARAM_VALUE | 0 | rdev->config.si.max_texture_channel_caches | 2,4,8,12 |
| PARAM_VALUE | 0 | rdev->config.si.max_tile_pipes | 4,8,12 |
| PARAM_VALUE | 0 | rdev->config.si.mem_max_burst_length_bytes | 256 |
| PARAM_VALUE | 0 | rdev->config.si.mem_row_size_in_kb | 1-2,4 |
| PARAM_VALUE | 0 | rdev->config.si.multi_gpu_tile_size | 64 |
| PARAM_VALUE | 0 | rdev->config.si.num_gpus | 1 |
| PARAM_VALUE | 0 | rdev->config.si.num_tile_pipes | 4,8 |
| PARAM_VALUE | 0 | rdev->config.si.sc_earlyz_tile_fifo_size | 304 |
| PARAM_VALUE | 0 | rdev->config.si.sc_hiz_tile_fifo_size | 48 |
| PARAM_VALUE | 0 | rdev->config.si.sc_prim_fifo_size_backend | 64,256 |
| PARAM_VALUE | 0 | rdev->config.si.sc_prim_fifo_size_frontend | 32 |
| PARAM_VALUE | 0 | rdev->config.si.shader_engine_tile_size | 32 |
| PARAM_VALUE | 0 | rdev->config.si.tile_config | 0-16383 |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->rlc.cs_data | 4966783948667543552 |
| PARAM_VALUE | 0 | rdev->usec_timeout | s32min-(-1),1-s32max |
| PARAM_VALUE | 1 | ring | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->ready | 1 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| BUF_SIZE | 0 | rdev->rlc.cs_data | 32 |
| BUF_SIZE | 0 | rdev->rlc.reg_list | (-1),872 |
| BUF_SIZE | 1 | ring | 1280 |
| CAPPED_DATA | 0 | rdev->config.si.max_cu_per_sh | 1 |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->scratch.num_reg | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920[c] |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920[c] |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states |
drivers/gpu/drm/radeon/si.c si_cp_resume() -> (struct radeon_asic_ring)->ring_test()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->accel_working | 1 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->config.si.backend_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->config.si.max_backends_per_se | 1-2,4 |
| PARAM_VALUE | 0 | rdev->config.si.max_cu_per_sh | 5-6,8 |
| PARAM_VALUE | 0 | rdev->config.si.max_gprs | 256 |
| PARAM_VALUE | 0 | rdev->config.si.max_gs_threads | 16,32 |
| PARAM_VALUE | 0 | rdev->config.si.max_hw_contexts | 8 |
| PARAM_VALUE | 0 | rdev->config.si.max_sh_per_se | 1-2 |
| PARAM_VALUE | 0 | rdev->config.si.max_shader_engines | 1-2 |
| PARAM_VALUE | 0 | rdev->config.si.max_texture_channel_caches | 2,4,8,12 |
| PARAM_VALUE | 0 | rdev->config.si.max_tile_pipes | 4,8,12 |
| PARAM_VALUE | 0 | rdev->config.si.mem_max_burst_length_bytes | 256 |
| PARAM_VALUE | 0 | rdev->config.si.mem_row_size_in_kb | 1-2,4 |
| PARAM_VALUE | 0 | rdev->config.si.multi_gpu_tile_size | 64 |
| PARAM_VALUE | 0 | rdev->config.si.num_gpus | 1 |
| PARAM_VALUE | 0 | rdev->config.si.num_tile_pipes | 4,8 |
| PARAM_VALUE | 0 | rdev->config.si.sc_earlyz_tile_fifo_size | 304 |
| PARAM_VALUE | 0 | rdev->config.si.sc_hiz_tile_fifo_size | 48 |
| PARAM_VALUE | 0 | rdev->config.si.sc_prim_fifo_size_backend | 64,256 |
| PARAM_VALUE | 0 | rdev->config.si.sc_prim_fifo_size_frontend | 32 |
| PARAM_VALUE | 0 | rdev->config.si.shader_engine_tile_size | 32 |
| PARAM_VALUE | 0 | rdev->config.si.tile_config | 0-16383 |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->rlc.cs_data | 4966783948667543552 |
| PARAM_VALUE | 0 | rdev->usec_timeout | s32min-(-1),1-s32max |
| PARAM_VALUE | 1 | ring | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->ready | 1 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| BUF_SIZE | 0 | rdev->rlc.cs_data | 32 |
| BUF_SIZE | 0 | rdev->rlc.reg_list | (-1),872 |
| BUF_SIZE | 1 | ring | 1120 |
| CAPPED_DATA | 0 | rdev->config.si.max_cu_per_sh | 1 |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->scratch.num_reg | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920[c] |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920[c] |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states |
drivers/gpu/drm/radeon/si.c si_cp_resume() -> (struct radeon_asic_ring)->ring_test()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->accel_working | 1 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->config.si.backend_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->config.si.max_backends_per_se | 1-2,4 |
| PARAM_VALUE | 0 | rdev->config.si.max_cu_per_sh | 5-6,8 |
| PARAM_VALUE | 0 | rdev->config.si.max_gprs | 256 |
| PARAM_VALUE | 0 | rdev->config.si.max_gs_threads | 16,32 |
| PARAM_VALUE | 0 | rdev->config.si.max_hw_contexts | 8 |
| PARAM_VALUE | 0 | rdev->config.si.max_sh_per_se | 1-2 |
| PARAM_VALUE | 0 | rdev->config.si.max_shader_engines | 1-2 |
| PARAM_VALUE | 0 | rdev->config.si.max_texture_channel_caches | 2,4,8,12 |
| PARAM_VALUE | 0 | rdev->config.si.max_tile_pipes | 4,8,12 |
| PARAM_VALUE | 0 | rdev->config.si.mem_max_burst_length_bytes | 256 |
| PARAM_VALUE | 0 | rdev->config.si.mem_row_size_in_kb | 1-2,4 |
| PARAM_VALUE | 0 | rdev->config.si.multi_gpu_tile_size | 64 |
| PARAM_VALUE | 0 | rdev->config.si.num_gpus | 1 |
| PARAM_VALUE | 0 | rdev->config.si.num_tile_pipes | 4,8 |
| PARAM_VALUE | 0 | rdev->config.si.sc_earlyz_tile_fifo_size | 304 |
| PARAM_VALUE | 0 | rdev->config.si.sc_hiz_tile_fifo_size | 48 |
| PARAM_VALUE | 0 | rdev->config.si.sc_prim_fifo_size_backend | 64,256 |
| PARAM_VALUE | 0 | rdev->config.si.sc_prim_fifo_size_frontend | 32 |
| PARAM_VALUE | 0 | rdev->config.si.shader_engine_tile_size | 32 |
| PARAM_VALUE | 0 | rdev->config.si.tile_config | 0-16383 |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->rlc.cs_data | 4966783948667543552 |
| PARAM_VALUE | 0 | rdev->usec_timeout | s32min-(-1),1-s32max |
| PARAM_VALUE | 1 | ring | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->ready | 1 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| BUF_SIZE | 0 | rdev->rlc.cs_data | 32 |
| BUF_SIZE | 0 | rdev->rlc.reg_list | (-1),872 |
| BUF_SIZE | 1 | ring | 960 |
| CAPPED_DATA | 0 | rdev->config.si.max_cu_per_sh | 1 |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->scratch.num_reg | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920[c] |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920[c] |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states |
drivers/gpu/drm/radeon/cik_sdma.c cik_sdma_gfx_resume() -> (struct radeon_asic_ring)->ring_test()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->accel_working | 1 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->config.cik.backend_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->config.cik.max_backends_per_se | 1-2,4 |
| PARAM_VALUE | 0 | rdev->config.cik.max_cu_per_sh | 2,7-8,11 |
| PARAM_VALUE | 0 | rdev->config.cik.max_gprs | 256 |
| PARAM_VALUE | 0 | rdev->config.cik.max_gs_threads | 16,32 |
| PARAM_VALUE | 0 | rdev->config.cik.max_hw_contexts | 8 |
| PARAM_VALUE | 0 | rdev->config.cik.max_sh_per_se | 1 |
| PARAM_VALUE | 0 | rdev->config.cik.max_shader_engines | 1-2,4 |
| PARAM_VALUE | 0 | rdev->config.cik.max_texture_channel_caches | 2,4,16 |
| PARAM_VALUE | 0 | rdev->config.cik.max_tile_pipes | 2,4,16 |
| PARAM_VALUE | 0 | rdev->config.cik.mem_max_burst_length_bytes | 256 |
| PARAM_VALUE | 0 | rdev->config.cik.mem_row_size_in_kb | 1-2,4 |
| PARAM_VALUE | 0 | rdev->config.cik.multi_gpu_tile_size | 64 |
| PARAM_VALUE | 0 | rdev->config.cik.num_gpus | 1 |
| PARAM_VALUE | 0 | rdev->config.cik.num_tile_pipes | 2,4 |
| PARAM_VALUE | 0 | rdev->config.cik.sc_earlyz_tile_fifo_size | 304 |
| PARAM_VALUE | 0 | rdev->config.cik.sc_hiz_tile_fifo_size | 48 |
| PARAM_VALUE | 0 | rdev->config.cik.sc_prim_fifo_size_backend | 256 |
| PARAM_VALUE | 0 | rdev->config.cik.sc_prim_fifo_size_frontend | 32 |
| PARAM_VALUE | 0 | rdev->config.cik.shader_engine_tile_size | 32 |
| PARAM_VALUE | 0 | rdev->config.cik.tile_config | 0-16383 |
| PARAM_VALUE | 0 | rdev->family | 57-61 |
| PARAM_VALUE | 0 | rdev->mec.num_mec | 1-2 |
| PARAM_VALUE | 0 | rdev->mec.num_pipe | 4 |
| PARAM_VALUE | 0 | rdev->mec.num_queue | 32-64 |
| PARAM_VALUE | 0 | rdev->pdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->rlc.cp_table_size | 67584 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data | 6736858177102118912 |
| PARAM_VALUE | 0 | rdev->sdma_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->usec_timeout | s32min-(-1),1-s32max |
| PARAM_VALUE | 1 | ring | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->ready | 1 |
| PARAM_VALUE | 1 | ring->wptr | 0 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| BUF_SIZE | 0 | rdev->rlc.cs_data | 32 |
| BUF_SIZE | 0 | rdev->rlc.reg_list | (-1),1284,1772 |
| BUF_SIZE | 1 | ring | 640,800 |
| BUF_SIZE | 1 | ring | 640,800 |
| CAPPED_DATA | 0 | rdev->config.cik.max_cu_per_sh | 1 |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->scratch.num_reg | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states |
drivers/gpu/drm/radeon/r100.c r100_cp_init() -> (struct radeon_asic_ring)->ring_test()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->accel_working | 1 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->dev | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->irq.installed | 1 |
| PARAM_VALUE | 0 | rdev->me_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pll_rreg | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pll_wreg | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->usec_timeout | s32min-(-1),1-s32max |
| PARAM_VALUE | 0 | rdev->wb.wb | 1-u64max |
| PARAM_VALUE | 0 | rdev->wb.wb_obj | 1-u64max |
| PARAM_VALUE | 1 | ring | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->align_mask | 15 |
| PARAM_VALUE | 1 | ring->last_activity.counter | 4294892296-23062724984436 |
| PARAM_VALUE | 1 | ring->nop | 2147483648 |
| PARAM_VALUE | 1 | ring->rdev | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->ring | 1-u64max |
| PARAM_VALUE | 1 | ring->ring_obj | 1-u64max |
| PARAM_VALUE | 1 | ring->rptr_offs | 1024 |
| PARAM_VALUE | 1 | ring->wptr | 0 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| BUF_SIZE | 1 | ring | 1280 |
| BUF_SIZE | 1 | ring | 1280 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->scratch.num_reg | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-u32max |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-u32max |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-1099494850560[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states |
drivers/gpu/drm/radeon/ni.c cayman_cp_resume() -> (struct radeon_asic_ring)->ring_test()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->accel_working | 1 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->config.cayman.max_backends_per_se | 1-2,4 |
| PARAM_VALUE | 0 | rdev->config.cayman.max_gprs | 256 |
| PARAM_VALUE | 0 | rdev->config.cayman.max_gs_threads | 32 |
| PARAM_VALUE | 0 | rdev->config.cayman.max_hw_contexts | 4,8 |
| PARAM_VALUE | 0 | rdev->config.cayman.max_pipes_per_simd | 4 |
| PARAM_VALUE | 0 | rdev->config.cayman.max_shader_engines | 1-2 |
| PARAM_VALUE | 0 | rdev->config.cayman.max_simds_per_se | 2-4,6,12 |
| PARAM_VALUE | 0 | rdev->config.cayman.max_stack_entries | 512 |
| PARAM_VALUE | 0 | rdev->config.cayman.max_texture_channel_caches | 2,8 |
| PARAM_VALUE | 0 | rdev->config.cayman.max_threads | 256 |
| PARAM_VALUE | 0 | rdev->config.cayman.max_tile_pipes | 2,8 |
| PARAM_VALUE | 0 | rdev->config.cayman.mem_max_burst_length_bytes | 256 |
| PARAM_VALUE | 0 | rdev->config.cayman.multi_gpu_tile_size | 4 |
| PARAM_VALUE | 0 | rdev->config.cayman.num_gpus | 1 |
| PARAM_VALUE | 0 | rdev->config.cayman.num_shader_engines | 1-2 |
| PARAM_VALUE | 0 | rdev->config.cayman.num_tile_pipes | 2,8 |
| PARAM_VALUE | 0 | rdev->config.cayman.sc_earlyz_tile_fifo_size | 304 |
| PARAM_VALUE | 0 | rdev->config.cayman.sc_hiz_tile_fifo_size | 48 |
| PARAM_VALUE | 0 | rdev->config.cayman.sc_prim_fifo_size | 64,256 |
| PARAM_VALUE | 0 | rdev->config.cayman.shader_engine_tile_size | 32 |
| PARAM_VALUE | 0 | rdev->config.cayman.sq_num_cf_insts | 2 |
| PARAM_VALUE | 0 | rdev->config.cayman.sx_max_export_pos_size | 32,64 |
| PARAM_VALUE | 0 | rdev->config.cayman.sx_max_export_size | 128,256 |
| PARAM_VALUE | 0 | rdev->config.cayman.sx_max_export_smx_size | 96,192 |
| PARAM_VALUE | 0 | rdev->config.cayman.sx_num_of_sets | 8 |
| PARAM_VALUE | 0 | rdev->config.cayman.tile_config | 0-3,16-19,32-35,4096-4099,4112-4115,4128-4131 |
| PARAM_VALUE | 0 | rdev->family | 50-51 |
| PARAM_VALUE | 0 | rdev->gart.num_gpu_pages | 0-s32max |
| PARAM_VALUE | 0 | rdev->gart.ptr | 1-u64max |
| PARAM_VALUE | 0 | rdev->gart.ready | 1 |
| PARAM_VALUE | 0 | rdev->gart.robj | 1-u64max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->usec_timeout | s32min-(-1),1-s32max |
| PARAM_VALUE | 0 | rdev->vram_scratch.ptr | 1-u64max |
| PARAM_VALUE | 0 | rdev->vram_scratch.robj | 1-u64max |
| PARAM_VALUE | 0 | rdev->wb.wb | 1-u64max |
| PARAM_VALUE | 0 | rdev->wb.wb_obj | 1-u64max |
| PARAM_VALUE | 1 | ring | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->ready | 1 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| BUF_SIZE | 0 | rdev->rlc.cs_data | (-1),64 |
| BUF_SIZE | 0 | rdev->rlc.reg_list | (-1),488 |
| BUF_SIZE | 1 | ring | 1280 |
| CAPPED_DATA | 0 | rdev->gart.num_gpu_pages | 1 |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->scratch.num_reg | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 1-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states |