| PARAM_VALUE |
0 |
rdev |
4096-ptr_max |
| PARAM_VALUE |
0 |
rdev->agp->agp_info.mode |
0 |
| PARAM_VALUE |
0 |
rdev->asic |
4096-ptr_max |
| PARAM_VALUE |
0 |
rdev->family |
57,60 |
| PARAM_VALUE |
0 |
rdev->mmio_idx_lock.rlock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
rdev->mode_info.atom_context->fb_base |
0 |
| PARAM_VALUE |
0 |
rdev->mode_info.atom_context->io_mode |
0 |
| PARAM_VALUE |
0 |
rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner |
(-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE |
0 |
rdev->mode_info.atom_context->reg_block |
0 |
| PARAM_VALUE |
0 |
rdev->mode_info.atom_context->scratch_mutex.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next |
5159360019465732096 |
| PARAM_VALUE |
0 |
rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev |
5159360019465732096 |
| PARAM_VALUE |
0 |
rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter |
0-s32max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count |
1-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count |
1-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count |
1-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count |
1-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count |
1-u32max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv |
4096-ptr_max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->acpi_vddc |
0 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->acpi_vddci |
0 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->active_auto_throttle_sources |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->arb_table_start |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->cac_enabled |
0-1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->caps_fps |
0 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->dll_default_on |
0 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask |
0-1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask |
0-3 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask |
0-1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->dpm_table.mclk_table.count |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->dpm_table.mvdd_table.count |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count |
0,6 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->dpm_table.sclk_table.count |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->dpm_table.vddc_table.count |
1-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->dpm_table.vddci_table.count |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->dpm_table_start |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->fan_table_start |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->mc_reg_table_start |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->mclk_activity_target |
0,10 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->mclk_edc_enable_threshold |
0,40000 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->mclk_edc_wr_enable_threshold |
0,40000 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->mclk_strobe_mode_threshold |
0,40000 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->mclk_stutter_mode_threshold |
0,40000 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->mvdd_control |
0-2 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->pcie_gen_performance.max |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->pcie_gen_performance.min |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->pcie_gen_powersaving.max |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->pcie_gen_powersaving.min |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->pcie_lane_performance.max |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->pcie_lane_performance.min |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->pcie_lane_powersaving.max |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->pcie_lane_powersaving.min |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->power_containment_features |
0-7 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->powertune_defaults->bapm_temp_gradient |
413794,458752,720896 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->powertune_defaults->dte_ambient_temp_base |
20,45,55 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->powertune_defaults->svi_load_line_en |
1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->powertune_defaults->svi_load_line_vddc |
15 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->powertune_defaults->tdc_mawt |
25 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->powertune_defaults->tdc_vddc_throttle_release_limit_perc |
253 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->powertune_defaults->tdc_waterfall_ctl |
5 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageHiSidd |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageLoSidd |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_powertune_table.FuzzyFan_PwmSetDelta |
s16min-s16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMaxVid |
1-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMinVid |
1-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineEn |
1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineTrimVddC |
3 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineVddC |
15 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_powertune_table.TDC_MAWt |
25 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_PkgLimit |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_ThrottleReleaseLimitPerc |
253 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_powertune_table.TdcWaterfallCtl |
5 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl2 |
0,4-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl3 |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl4 |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.ACPILevel.Flags |
0,2-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddc |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddcPhases |
0-1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkDid |
0-1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkFrequency |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum2 |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.ACPInterval |
1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.AcpLevelCount |
1-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.BAPM_TEMP_GRADIENT |
413794,458752,720896 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.BootMVdd |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.BootVddc |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.BootVddci |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.DTEAmbientTempBase |
20,45,55 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.DTETjOffset |
0-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.DefaultTdp |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.FpsHighT |
45 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.FpsLowT |
30 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.GpuTjHyst |
8 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.GpuTjMax |
0-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.GraphicsBootLevel |
0-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.GraphicsDpmLevelCount |
0-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.GraphicsInterval |
1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.GraphicsThermThrottleEnable |
1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.GraphicsVoltageChangeEnable |
1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.LinkLevelCount |
0-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.ActivityLevel |
0,10 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DllCntl |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DownH |
100 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MclkPwrmgtCntl |
196608-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddc |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddcPhases |
0-1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddci |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllAdFuncCntl |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllDqFuncCntl |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_1 |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_2 |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs1 |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs2 |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryBootLevel |
0-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryDpmLevelCount |
0-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryInterval |
1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryThermThrottleEnable |
1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MemoryVoltageChangeEnable |
1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.MvddLevelCount |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.PCIeBootLinkLevel |
5,255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.PCIeGenInterval |
1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.PPM_PkgPwrLimit |
0-16776 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.PPM_TemperatureLimit |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.SAMUInterval |
1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.SVI2Enable |
0-1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.SamuLevelCount |
1-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.SclkStepSize |
16384 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.SmioMaskMvddVid |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.SmioMaskVddcVid |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.SmioMaskVddciVid |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.SystemFlags |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.TargetTdp |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.TemperatureLimitHigh |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.TemperatureLimitLow |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.ThermGpio |
17 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.ThermalInterval |
1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.UVDInterval |
1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffset |
0-u16max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffsetVid |
0-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.Ulv.VddcPhase |
0-1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.UvdLevelCount |
1-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.VCEInterval |
1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.VceLevelCount |
1-255 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.VddcLevelCount |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.VddcVddciDelta |
4000 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.VddciLevelCount |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->smc_state_table.VoltageInterval |
1 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->soft_regs_start |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->sram_end |
0,262144 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->ulv.supported |
0 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->vddc_voltage_table.count |
0-4294967295 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->vddci_control |
0-2 |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv->voltage_control |
0-2 |
| PARAM_VALUE |
0 |
rdev->pm.mutex.first_waiter |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rdev->pm.mutex.osq.tail.counter |
0-s32max |
| PARAM_VALUE |
0 |
rdev->pm.mutex.wait_lock.owner |
(-1) |
| PARAM_VALUE |
0 |
rdev->pm.mutex.wait_lock.owner_cpu |
u32max |
| PARAM_VALUE |
0 |
rdev->pm.pm_method |
2 |
| PARAM_VALUE |
0 |
rdev->rlc.cs_data->section->reg_index |
0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530 |
| PARAM_VALUE |
0 |
rdev->smc_fw |
4096-ptr_max |
| PARAM_VALUE |
0 |
rdev->smc_idx_lock.rlock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
*rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd |
0-255 |
| PARAM_VALUE |
0 |
*rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd2 |
0-255 |
| PARAM_VALUE |
0 |
*rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidLoSidd |
0-255 |
| PARAM_VALUE |
0 |
*rdev->pm.dpm.priv->smc_powertune_table.VddCVid |
0-255 |
| BUF_SIZE |
0 |
rdev |
s32min-(-1),1-s32max |
| BUF_SIZE |
0 |
rdev |
s32min-(-1),1-s32max |
| BUF_SIZE |
0 |
rdev->agp |
(-1),144 |
| CAPPED_DATA |
0 |
rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count |
1 |
| CAPPED_DATA |
0 |
rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count |
1 |
| CAPPED_DATA |
0 |
rdev->pm.dpm.priv->sram_end |
1 |
| CAPPED_DATA |
0 |
rdev->pm.dpm.priv->vddc_voltage_table.count |
1 |
| CAPPED_DATA |
0 |
rdev->rmmio_size |
1 |
| CAPPED_DATA |
0 |
rdev->usec_timeout |
1 |
| DATA_SOURCE |
0 |
rdev |
$0 |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| NOCHECK_CALL |
|
|
|
| HOST_DATA |
0 |
rdev->gart.num_cpu_pages |
0-524287[c] |
| HOST_DATA |
0 |
rdev->mc.aper_base |
0-1099511627775[c] |
| HOST_DATA |
0 |
rdev->mc.gtt_size |
0-s32max[c] |
| HOST_DATA |
0 |
rdev->mc.gtt_start |
0-u64max[c] |
| HOST_DATA |
0 |
rdev->mc.mc_vram_size |
0-4503599626321920 |
| HOST_DATA |
0 |
rdev->mc.real_vram_size |
0-4503599626321920 |
| HOST_DATA |
0 |
rdev->mc.vram_end |
0-4504699121172479,u64max[c] |
| HOST_DATA |
0 |
rdev->mc.vram_start |
0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE |
0 |
rdev->pm.current_power_state_index |
|
| NO_OVERFLOW_SIMPLE |
0 |
rdev->pm.default_power_state_index |
|
| NO_OVERFLOW_SIMPLE |
0 |
rdev->pm.num_power_states |
|
| NO_OVERFLOW_SIMPLE |
0 |
rdev->rmmio_size |
|
| LOCK2 |
|
&rdev->pm.mutex |
|
| TYPE_LOCK |
|
(struct radeon_pm)->mutex |
|