Defined in 1 files as a prototype:
Defined in 2 files as a function:
- drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c, line 208 (as a function)
- drivers/gpu/drm/radeon/ci_dpm.c, line 1615 (as a function)
Referenced in 2 files:
- drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
-
drivers/gpu/drm/radeon/ci_dpm.c
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Smatch caller information:
drivers/gpu/drm/radeon/ci_dpm.c ci_dpm_force_performance_level() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.thermal_active | 0 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 1 | msg | 328 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mutex | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->pm.mclk_lock | ||
| HALF_LOCKED2 | &rdev->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_ds_master_switch() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 57,60 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mvdd_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 0,6 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddc_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddci_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->bapm_temp_gradient | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->dte_ambient_temp_base | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_en | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_vddc | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_mawt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_vddc_throttle_release_limit_perc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_waterfall_ctl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageHiSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageLoSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.FuzzyFan_PwmSetDelta | s16min-s16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMaxVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMinVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineEn | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineTrimVddC | 3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineVddC | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_MAWt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_PkgLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_ThrottleReleaseLimitPerc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TdcWaterfallCtl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.Flags | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkDid | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkFrequency | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.AcpLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BAPM_TEMP_GRADIENT | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootMVdd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddc | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddci | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTEAmbientTempBase | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTETjOffset | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DefaultTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsHighT | 45 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsLowT | 30 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjHyst | 8 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjMax | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.LinkLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.ActivityLevel | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DllCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DownH | 100 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MclkPwrmgtCntl | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddci | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllAdFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllDqFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MvddLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeBootLinkLevel | 5,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeGenInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_PkgPwrLimit | 0-16776 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_TemperatureLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SAMUInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SVI2Enable | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SamuLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SclkStepSize | 16384 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskMvddVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddcVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddciVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SystemFlags | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TargetTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitHigh | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitLow | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermGpio | 17 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermalInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UVDInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffset | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffsetVid | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcPhase | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UvdLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VCEInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VceLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcVddciDelta | 4000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddciLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VoltageInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->ulv.supported | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd2 | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidLoSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.VddCVid | 0-255 |
| PARAM_VALUE | 1 | msg | 399 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_ds_master_switch() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 57,60 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mvdd_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 0,6 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddc_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddci_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->bapm_temp_gradient | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->dte_ambient_temp_base | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_en | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_vddc | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_mawt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_vddc_throttle_release_limit_perc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_waterfall_ctl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageHiSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageLoSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.FuzzyFan_PwmSetDelta | s16min-s16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMaxVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMinVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineEn | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineTrimVddC | 3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineVddC | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_MAWt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_PkgLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_ThrottleReleaseLimitPerc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TdcWaterfallCtl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.Flags | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkDid | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkFrequency | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.AcpLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BAPM_TEMP_GRADIENT | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootMVdd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddc | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddci | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTEAmbientTempBase | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTETjOffset | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DefaultTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsHighT | 45 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsLowT | 30 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjHyst | 8 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjMax | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.LinkLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.ActivityLevel | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DllCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DownH | 100 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MclkPwrmgtCntl | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddci | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllAdFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllDqFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MvddLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeBootLinkLevel | 5,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeGenInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_PkgPwrLimit | 0-16776 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_TemperatureLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SAMUInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SVI2Enable | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SamuLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SclkStepSize | 16384 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskMvddVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddcVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddciVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SystemFlags | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TargetTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitHigh | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitLow | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermGpio | 17 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermalInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UVDInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffset | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffsetVid | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcPhase | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UvdLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VCEInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VceLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcVddciDelta | 4000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddciLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VoltageInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->ulv.supported | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd2 | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidLoSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.VddCVid | 0-255 |
| PARAM_VALUE | 1 | msg | 400 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_ds_master_switch() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->active_auto_throttle_sources | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_ctrl_is_in_default_mode | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->power_containment_features | 0-7 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_power_gated | 0 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | msg | 400 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_power_containment() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->agp->agp_info.mode | 0 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 57,60 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->acpi_vddc | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->acpi_vddci | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->caps_fps | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dll_default_on | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mvdd_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 0,6 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddc_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddci_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_activity_target | 0,10 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_edc_enable_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_edc_wr_enable_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_strobe_mode_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_stutter_mode_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->bapm_temp_gradient | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->dte_ambient_temp_base | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_en | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_vddc | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_mawt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_vddc_throttle_release_limit_perc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_waterfall_ctl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageHiSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageLoSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.FuzzyFan_PwmSetDelta | s16min-s16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMaxVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMinVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineEn | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineTrimVddC | 3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineVddC | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_MAWt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_PkgLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_ThrottleReleaseLimitPerc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TdcWaterfallCtl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.Flags | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkDid | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkFrequency | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.AcpLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BAPM_TEMP_GRADIENT | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootMVdd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddc | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddci | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTEAmbientTempBase | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTETjOffset | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DefaultTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsHighT | 45 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsLowT | 30 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjHyst | 8 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjMax | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.LinkLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.ActivityLevel | 0,10 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DllCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DownH | 100 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MclkPwrmgtCntl | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddci | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllAdFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllDqFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MvddLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeBootLinkLevel | 5,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeGenInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_PkgPwrLimit | 0-16776 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_TemperatureLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SAMUInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SVI2Enable | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SamuLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SclkStepSize | 16384 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskMvddVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddcVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddciVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SystemFlags | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TargetTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitHigh | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitLow | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermGpio | 17 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermalInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UVDInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffset | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffsetVid | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcPhase | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UvdLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VCEInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VceLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcVddciDelta | 4000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddciLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VoltageInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->sram_end | 0,262144 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->ulv.supported | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddci_control | 0-2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->voltage_control | 0-2 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data->section->reg_index | 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd2 | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidLoSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.VddCVid | 0-255 |
| PARAM_VALUE | 1 | msg | 135 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->sram_end | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_power_containment() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->agp->agp_info.mode | 0 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 57,60 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->acpi_vddc | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->acpi_vddci | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->caps_fps | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dll_default_on | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mvdd_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 0,6 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddc_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddci_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_activity_target | 0,10 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_edc_enable_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_edc_wr_enable_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_strobe_mode_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_stutter_mode_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->bapm_temp_gradient | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->dte_ambient_temp_base | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_en | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_vddc | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_mawt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_vddc_throttle_release_limit_perc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_waterfall_ctl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageHiSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageLoSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.FuzzyFan_PwmSetDelta | s16min-s16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMaxVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMinVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineEn | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineTrimVddC | 3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineVddC | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_MAWt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_PkgLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_ThrottleReleaseLimitPerc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TdcWaterfallCtl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.Flags | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkDid | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkFrequency | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.AcpLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BAPM_TEMP_GRADIENT | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootMVdd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddc | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddci | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTEAmbientTempBase | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTETjOffset | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DefaultTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsHighT | 45 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsLowT | 30 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjHyst | 8 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjMax | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.LinkLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.ActivityLevel | 0,10 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DllCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DownH | 100 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MclkPwrmgtCntl | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddci | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllAdFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllDqFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MvddLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeBootLinkLevel | 5,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeGenInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_PkgPwrLimit | 0-16776 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_TemperatureLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SAMUInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SVI2Enable | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SamuLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SclkStepSize | 16384 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskMvddVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddcVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddciVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SystemFlags | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TargetTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitHigh | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitLow | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermGpio | 17 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermalInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UVDInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffset | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffsetVid | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcPhase | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UvdLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VCEInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VceLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcVddciDelta | 4000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddciLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VoltageInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->sram_end | 0,262144 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->ulv.supported | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddci_control | 0-2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->voltage_control | 0-2 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data->section->reg_index | 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd2 | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidLoSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.VddCVid | 0-255 |
| PARAM_VALUE | 1 | msg | 361 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->sram_end | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_power_containment() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->agp->agp_info.mode | 0 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 57,60 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->acpi_vddc | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->acpi_vddci | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->caps_fps | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dll_default_on | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mvdd_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 0,6 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddc_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddci_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_activity_target | 0,10 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_edc_enable_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_edc_wr_enable_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_strobe_mode_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_stutter_mode_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->bapm_temp_gradient | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->dte_ambient_temp_base | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_en | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_vddc | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_mawt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_vddc_throttle_release_limit_perc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_waterfall_ctl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageHiSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageLoSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.FuzzyFan_PwmSetDelta | s16min-s16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMaxVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMinVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineEn | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineTrimVddC | 3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineVddC | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_MAWt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_PkgLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_ThrottleReleaseLimitPerc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TdcWaterfallCtl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.Flags | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkDid | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkFrequency | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.AcpLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BAPM_TEMP_GRADIENT | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootMVdd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddc | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddci | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTEAmbientTempBase | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTETjOffset | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DefaultTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsHighT | 45 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsLowT | 30 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjHyst | 8 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjMax | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.LinkLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.ActivityLevel | 0,10 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DllCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DownH | 100 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MclkPwrmgtCntl | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddci | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllAdFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllDqFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MvddLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeBootLinkLevel | 5,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeGenInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_PkgPwrLimit | 0-16776 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_TemperatureLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SAMUInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SVI2Enable | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SamuLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SclkStepSize | 16384 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskMvddVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddcVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddciVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SystemFlags | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TargetTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitHigh | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitLow | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermGpio | 17 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermalInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UVDInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffset | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffsetVid | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcPhase | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UvdLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VCEInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VceLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcVddciDelta | 4000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddciLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VoltageInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->sram_end | 0,262144 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->ulv.supported | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddci_control | 0-2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->voltage_control | 0-2 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data->section->reg_index | 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd2 | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidLoSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.VddCVid | 0-255 |
| PARAM_VALUE | 1 | msg | 389 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->sram_end | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_power_containment() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_ctrl_is_in_default_mode | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_power_gated | 0 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data->section->reg_index | 0,40960,41174,41176,41461,41471-41472,41530,41630,41632-41633,41635,41637,41694,41717,62460,65472 |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | msg | 362 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_power_containment() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_ctrl_is_in_default_mode | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_power_gated | 0 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data->section->reg_index | 0,40960,41174,41176,41461,41471-41472,41530,41630,41632-41633,41635,41637,41694,41717,62460,65472 |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | msg | 136 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_power_containment() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_ctrl_is_in_default_mode | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_power_gated | 0 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data->section->reg_index | 0,40960,41174,41176,41461,41471-41472,41530,41630,41632-41633,41635,41637,41694,41717,62460,65472 |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | msg | 390 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_sclk_mclk_dpm() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 57,60 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mvdd_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 0,6 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddc_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddci_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->bapm_temp_gradient | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->dte_ambient_temp_base | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_en | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_vddc | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_mawt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_vddc_throttle_release_limit_perc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_waterfall_ctl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageHiSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageLoSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.FuzzyFan_PwmSetDelta | s16min-s16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMaxVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMinVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineEn | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineTrimVddC | 3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineVddC | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_MAWt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_PkgLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_ThrottleReleaseLimitPerc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TdcWaterfallCtl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.Flags | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkDid | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkFrequency | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.AcpLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BAPM_TEMP_GRADIENT | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootMVdd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddc | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddci | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTEAmbientTempBase | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTETjOffset | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DefaultTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsHighT | 45 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsLowT | 30 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjHyst | 8 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjMax | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.LinkLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.ActivityLevel | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DllCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DownH | 100 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MclkPwrmgtCntl | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddci | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllAdFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllDqFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MvddLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeBootLinkLevel | 5,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeGenInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_PkgPwrLimit | 0-16776 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_TemperatureLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SAMUInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SVI2Enable | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SamuLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SclkStepSize | 16384 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskMvddVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddcVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddciVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SystemFlags | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TargetTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitHigh | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitLow | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermGpio | 17 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermalInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UVDInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffset | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffsetVid | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcPhase | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UvdLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VCEInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VceLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcVddciDelta | 4000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddciLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VoltageInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->ulv.supported | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd2 | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidLoSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.VddCVid | 0-255 |
| PARAM_VALUE | 1 | msg | 334 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->gart.table_size | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_sclk_mclk_dpm() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 57,60 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mvdd_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 0,6 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddc_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddci_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->bapm_temp_gradient | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->dte_ambient_temp_base | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_en | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_vddc | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_mawt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_vddc_throttle_release_limit_perc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_waterfall_ctl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageHiSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageLoSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.FuzzyFan_PwmSetDelta | s16min-s16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMaxVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMinVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineEn | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineTrimVddC | 3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineVddC | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_MAWt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_PkgLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_ThrottleReleaseLimitPerc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TdcWaterfallCtl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.Flags | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkDid | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkFrequency | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.AcpLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BAPM_TEMP_GRADIENT | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootMVdd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddc | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddci | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTEAmbientTempBase | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTETjOffset | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DefaultTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsHighT | 45 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsLowT | 30 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjHyst | 8 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjMax | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.LinkLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.ActivityLevel | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DllCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DownH | 100 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MclkPwrmgtCntl | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddci | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllAdFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllDqFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MvddLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeBootLinkLevel | 5,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeGenInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_PkgPwrLimit | 0-16776 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_TemperatureLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SAMUInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SVI2Enable | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SamuLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SclkStepSize | 16384 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskMvddVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddcVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddciVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SystemFlags | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TargetTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitHigh | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitLow | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermGpio | 17 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermalInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UVDInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffset | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffsetVid | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcPhase | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UvdLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VCEInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VceLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcVddciDelta | 4000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddciLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VoltageInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->ulv.supported | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd2 | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidLoSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.VddCVid | 0-255 |
| PARAM_VALUE | 1 | msg | 336 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->gart.table_size | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_sclk_mclk_dpm() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->active_auto_throttle_sources | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_ctrl_is_in_default_mode | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->power_containment_features | 0-7 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_power_gated | 0 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | msg | 335 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->gart.table_size | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_sclk_mclk_dpm() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->active_auto_throttle_sources | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_ctrl_is_in_default_mode | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->power_containment_features | 0-7 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_power_gated | 0 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | msg | 337 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->gart.table_size | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_smc_cac() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->agp->agp_info.mode | 0 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 57,60 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->acpi_vddc | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->acpi_vddci | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->caps_fps | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dll_default_on | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mvdd_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 0,6 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddc_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddci_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_activity_target | 0,10 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_edc_enable_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_edc_wr_enable_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_strobe_mode_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_stutter_mode_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->bapm_temp_gradient | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->dte_ambient_temp_base | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_en | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_vddc | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_mawt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_vddc_throttle_release_limit_perc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_waterfall_ctl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageHiSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageLoSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.FuzzyFan_PwmSetDelta | s16min-s16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMaxVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMinVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineEn | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineTrimVddC | 3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineVddC | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_MAWt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_PkgLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_ThrottleReleaseLimitPerc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TdcWaterfallCtl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.Flags | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkDid | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkFrequency | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.AcpLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BAPM_TEMP_GRADIENT | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootMVdd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddc | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddci | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTEAmbientTempBase | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTETjOffset | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DefaultTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsHighT | 45 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsLowT | 30 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjHyst | 8 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjMax | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.LinkLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.ActivityLevel | 0,10 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DllCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DownH | 100 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MclkPwrmgtCntl | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddci | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllAdFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllDqFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MvddLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeBootLinkLevel | 5,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeGenInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_PkgPwrLimit | 0-16776 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_TemperatureLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SAMUInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SVI2Enable | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SamuLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SclkStepSize | 16384 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskMvddVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddcVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddciVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SystemFlags | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TargetTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitHigh | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitLow | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermGpio | 17 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermalInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UVDInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffset | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffsetVid | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcPhase | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UvdLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VCEInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VceLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcVddciDelta | 4000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddciLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VoltageInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->sram_end | 0,262144 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->ulv.supported | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddci_control | 0-2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->voltage_control | 0-2 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data->section->reg_index | 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd2 | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidLoSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.VddCVid | 0-255 |
| PARAM_VALUE | 1 | msg | 83 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->sram_end | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_smc_cac() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_ctrl_is_in_default_mode | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->power_containment_features | 0-7 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_power_gated | 0 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data->section->reg_index | 0,40960,41174,41176,41461,41471-41472,41530,41630,41632-41633,41635,41637,41694,41717,62460,65472 |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | msg | 84 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_thermal_based_sclk_dpm() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->agp->agp_info.mode | 0 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 57,60 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->acpi_vddc | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->acpi_vddci | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->active_auto_throttle_sources | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->caps_fps | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dll_default_on | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mvdd_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 0,6 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddc_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddci_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_activity_target | 0,10 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_edc_enable_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_edc_wr_enable_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_strobe_mode_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_stutter_mode_threshold | 0,40000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->power_containment_features | 0-7 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->bapm_temp_gradient | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->dte_ambient_temp_base | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_en | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_vddc | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_mawt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_vddc_throttle_release_limit_perc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_waterfall_ctl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageHiSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageLoSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.FuzzyFan_PwmSetDelta | s16min-s16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMaxVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMinVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineEn | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineTrimVddC | 3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineVddC | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_MAWt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_PkgLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_ThrottleReleaseLimitPerc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TdcWaterfallCtl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.Flags | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkDid | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkFrequency | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.AcpLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BAPM_TEMP_GRADIENT | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootMVdd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddc | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddci | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTEAmbientTempBase | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTETjOffset | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DefaultTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsHighT | 45 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsLowT | 30 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjHyst | 8 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjMax | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.LinkLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.ActivityLevel | 0,10 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DllCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DownH | 100 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MclkPwrmgtCntl | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddci | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllAdFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllDqFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MvddLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeBootLinkLevel | 5,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeGenInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_PkgPwrLimit | 0-16776 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_TemperatureLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SAMUInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SVI2Enable | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SamuLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SclkStepSize | 16384 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskMvddVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddcVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddciVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SystemFlags | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TargetTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitHigh | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitLow | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermGpio | 17 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermalInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UVDInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffset | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffsetVid | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcPhase | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UvdLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VCEInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VceLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcVddciDelta | 4000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddciLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VoltageInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->sram_end | 0,262144 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->ulv.supported | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddci_control | 0-2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->voltage_control | 0-2 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data->section->reg_index | 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd2 | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidLoSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.VddCVid | 0-255 |
| PARAM_VALUE | 1 | msg | 412 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->sram_end | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_thermal_based_sclk_dpm() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->active_auto_throttle_sources | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_ctrl_is_in_default_mode | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->power_containment_features | 0-7 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->ulv.supported | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_power_gated | 0 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data->section->reg_index | 0,40960,41174,41176,41461,41471-41472,41530,41630,41632-41633,41635,41637,41694,41717,62460,65472 |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | msg | 413 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_ulv() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 57,60 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mvdd_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 0,6 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddc_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddci_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->bapm_temp_gradient | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->dte_ambient_temp_base | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_en | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_vddc | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_mawt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_vddc_throttle_release_limit_perc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_waterfall_ctl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageHiSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageLoSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.FuzzyFan_PwmSetDelta | s16min-s16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMaxVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMinVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineEn | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineTrimVddC | 3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineVddC | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_MAWt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_PkgLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_ThrottleReleaseLimitPerc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TdcWaterfallCtl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.Flags | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkDid | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkFrequency | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.AcpLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BAPM_TEMP_GRADIENT | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootMVdd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddc | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddci | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTEAmbientTempBase | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTETjOffset | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DefaultTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsHighT | 45 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsLowT | 30 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjHyst | 8 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjMax | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.LinkLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.ActivityLevel | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DllCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DownH | 100 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MclkPwrmgtCntl | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddci | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllAdFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllDqFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MvddLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeBootLinkLevel | 5,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeGenInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_PkgPwrLimit | 0-16776 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_TemperatureLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SAMUInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SVI2Enable | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SamuLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SclkStepSize | 16384 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskMvddVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddcVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddciVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SystemFlags | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TargetTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitHigh | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitLow | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermGpio | 17 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermalInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UVDInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffset | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffsetVid | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcPhase | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UvdLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VCEInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VceLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcVddciDelta | 4000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddciLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VoltageInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->ulv.supported | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd2 | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidLoSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.VddCVid | 0-255 |
| PARAM_VALUE | 1 | msg | 98 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_ulv() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->active_auto_throttle_sources | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_ctrl_is_in_default_mode | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->power_containment_features | 0-7 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_power_gated | 0 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | msg | 99 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_uvd_dpm() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data->section->reg_index | 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530,41630,41632-41633,41635,41637-41638,41694,41701,41717,41920,62460,65472 |
| PARAM_VALUE | 1 | msg | 340-341 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| FUZZY_MAX | 1 | msg | 341 |
| BIT_INFO | 1 | msg | 0x154,0x155 |
| HARD_MAX | 1 | msg | 341 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.audio_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.audio_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.dither_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.dither_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.output_csc_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.output_csc_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.tmds_pll_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.tmds_pll_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.tv_std_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.tv_std_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.underscan_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.underscan_property->num_values | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_vce_dpm() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->gart.robj->tbo.bdev->dev_mapping->host->i_sb->s_export_op->encode_fh | 0,2,1398972869330624512,1616549510479982592,2037984473558433792,2776440803454029824,3228746867770966016,3502492669594062848,3526768263295340544,3559173554394271744,5000850239487131648,5583386343686406144,5817357685191483392-s64max |
| PARAM_VALUE | 0 | rdev->gart.robj->tbo.bdev->dev_mapping->host->i_sb->s_export_op->fh_to_dentry | 0,8684,447817974243774464,687732489194512384,742201802719268864,868497899885588480,1471448175530500096,2021658383390310400,2445877819203563520,2512819722689847296,2649270699546726400,2761259683714371584,2893332316235677696-s64max |
| PARAM_VALUE | 0 | rdev->gart.robj->tbo.bdev->dev_mapping->host->i_sb->s_export_op->fh_to_parent | 0,5297,148606482432692224,436469935444291584,467281172929331200,529780027764285440,1092893949038768128,1556959531105513472,1608953577475584000,1649536479961075712,2404761408063094784,2970908329832960000,3511613614414655488-s64max |
| PARAM_VALUE | 0 | rdev->gart.robj->tbo.bdev->dev_mapping->host->i_sb->s_export_op->get_parent | 0,8931,264940071972966400,291591359766798336,565128213429456896,893189740598853632,1241177127089143808,1474696885321834496,1812477326828269568,1893665921928286208,2210088671756947456,2437012291923775488,2483979068402987008-s64max |
| PARAM_VALUE | 0 | rdev->pciep_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->last_mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->need_update_smu7_dpm_table | 0-3,8-11 |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 1-u64max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->uvd_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->vce.vcpu_bo->tbo.bdev->dev_mapping->host->i_sb->s_export_op->encode_fh | 0,2,1398972869330624512,1616549510479982592,2037984473558433792,2776440803454029824,3228746867770966016,3502492669594062848,3526768263295340544,3559173554394271744,5000850239487131648,5583386343686406144,5817357685191483392-s64max |
| PARAM_VALUE | 0 | rdev->vce.vcpu_bo->tbo.bdev->dev_mapping->host->i_sb->s_export_op->fh_to_parent | 0,5297,148606482432692224,436469935444291584,467281172929331200,529780027764285440,1092893949038768128,1556959531105513472,1608953577475584000,1649536479961075712,2404761408063094784,2970908329832960000,3511613614414655488-s64max |
| PARAM_VALUE | 0 | rdev->vce.vcpu_bo->tbo.bdev->dev_mapping->host->i_sb->s_export_op->get_parent | 0,8931,264940071972966400,291591359766798336,565128213429456896,893189740598853632,1241177127089143808,1474696885321834496,1812477326828269568,1893665921928286208,2210088671756947456,2437012291923775488,2483979068402987008-s64max |
| PARAM_VALUE | 1 | msg | 346-347 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.new_active_crtc_count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| FUZZY_MAX | 1 | msg | 347 |
| BIT_INFO | 1 | msg | 0x15a,0x15b |
| HARD_MAX | 1 | msg | 347 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_enable_vr_hot_gpio_interrupt() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 57,60 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.platform_caps | 65536-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mvdd_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 0,6 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddc_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddci_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->bapm_temp_gradient | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->dte_ambient_temp_base | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_en | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_vddc | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_mawt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_vddc_throttle_release_limit_perc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_waterfall_ctl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageHiSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageLoSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.FuzzyFan_PwmSetDelta | s16min-s16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMaxVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMinVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineEn | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineTrimVddC | 3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineVddC | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_MAWt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_PkgLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_ThrottleReleaseLimitPerc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TdcWaterfallCtl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.Flags | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkDid | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkFrequency | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.AcpLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BAPM_TEMP_GRADIENT | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootMVdd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddc | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddci | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTEAmbientTempBase | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTETjOffset | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DefaultTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsHighT | 45 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsLowT | 30 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjHyst | 8 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjMax | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.LinkLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.ActivityLevel | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DllCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DownH | 100 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MclkPwrmgtCntl | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddci | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllAdFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllDqFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MvddLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeBootLinkLevel | 5,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeGenInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_PkgPwrLimit | 0-16776 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_TemperatureLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SAMUInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SVI2Enable | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SamuLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SclkStepSize | 16384 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskMvddVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddcVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddciVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SystemFlags | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TargetTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitHigh | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitLow | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermGpio | 17 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermalInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UVDInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffset | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffsetVid | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcPhase | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UvdLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VCEInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VceLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcVddciDelta | 4000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddciLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VoltageInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->ulv.supported | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd2 | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidLoSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.VddCVid | 0-255 |
| PARAM_VALUE | 1 | msg | 330 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| BIT_INFO | 0 | rdev->pm.dpm.platform_caps | 0x10000,0xffffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_fan_ctrl_stop_smc_fan_control() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->dpm.fan_ctrl_set_mode | 2007802236017979392,4145778669969403904 |
| PARAM_VALUE | 0 | rdev->pm.dpm.fan.ucode_fan_control | 1 |
| PARAM_VALUE | 1 | msg | 92 |
| BUF_SIZE | 0 | rdev | s32min-(-2),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-2),1-s32max |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &of->mutex | ||
| HALF_LOCKED2 | &of->prealloc_mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct kernfs_open_file)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_freeze_sclk_mclk_dpm() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->need_update_smu7_dpm_table | 0-3,8-11 |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 1-u64max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 1 | msg | 393 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| CAPPED_DATA | 0 | rdev->pm.dpm.new_active_crtc_count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_freeze_sclk_mclk_dpm() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->need_update_smu7_dpm_table | 0-3,8-11 |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 1-u64max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 1 | msg | 395 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| CAPPED_DATA | 0 | rdev->pm.dpm.new_active_crtc_count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_notify_smc_display_change() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | msg | 93-94 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| FUZZY_MAX | 1 | msg | 94 |
| BIT_INFO | 1 | msg | 0x5c,0x5f |
| HARD_MAX | 1 | msg | 94 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_reset_to_default() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->active_auto_throttle_sources | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_ctrl_is_in_default_mode | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->power_containment_features | 0-7 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->ulv.supported | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_power_gated | 0 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | msg | 132 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc_return_parameter() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 1 | msg | 512-513 |
| BUF_SIZE | 0 | rdev | s32min-(-2),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-2),1-s32max |
| DATA_SOURCE | 0 | rdev | $0 |
| DATA_SOURCE | 1 | msg | $1 |
| HARD_MAX | 1 | msg | 513 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &m->lock | ||
| HALF_LOCKED2 | &rdev->pm.mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc_with_parameter() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->dpm.fan_ctrl_set_mode | 0,2007802236017979392,4145778669969403904 |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->gart.robj->tbo.bdev->dev_mapping->host->i_sb->s_export_op->encode_fh | 0,2,1398972869330624512,1616549510479982592,2037984473558433792,2776440803454029824,3228746867770966016,3502492669594062848,3526768263295340544,3559173554394271744,5000850239487131648,5583386343686406144,5817357685191483392-s64max |
| PARAM_VALUE | 0 | rdev->gart.robj->tbo.bdev->dev_mapping->host->i_sb->s_export_op->fh_to_dentry | 0,8684,447817974243774464,687732489194512384,742201802719268864,868497899885588480,1471448175530500096,2021658383390310400,2445877819203563520,2512819722689847296,2649270699546726400,2761259683714371584,2893332316235677696-s64max |
| PARAM_VALUE | 0 | rdev->gart.robj->tbo.bdev->dev_mapping->host->i_sb->s_export_op->fh_to_parent | 0,5297,148606482432692224,436469935444291584,467281172929331200,529780027764285440,1092893949038768128,1556959531105513472,1608953577475584000,1649536479961075712,2404761408063094784,2970908329832960000,3511613614414655488-s64max |
| PARAM_VALUE | 0 | rdev->gart.robj->tbo.bdev->dev_mapping->host->i_sb->s_export_op->get_parent | 0,8931,264940071972966400,291591359766798336,565128213429456896,893189740598853632,1241177127089143808,1474696885321834496,1812477326828269568,1893665921928286208,2210088671756947456,2437012291923775488,2483979068402987008-s64max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data->section->reg_index | 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530,41630,41632-41633,41635,41637-41638,41694,41701,41717,41920,62460,65472 |
| PARAM_VALUE | 0 | rdev->vce.vcpu_bo->tbo.bdev->dev_mapping->host->i_sb->s_export_op->encode_fh | 0,2,1398972869330624512,1616549510479982592,2037984473558433792,2776440803454029824,3228746867770966016,3502492669594062848,3526768263295340544,3559173554394271744,5000850239487131648,5583386343686406144,5817357685191483392-s64max |
| PARAM_VALUE | 0 | rdev->vce.vcpu_bo->tbo.bdev->dev_mapping->host->i_sb->s_export_op->fh_to_dentry | 0,8684,447817974243774464,687732489194512384,742201802719268864,868497899885588480,1471448175530500096,2021658383390310400,2445877819203563520,2512819722689847296,2649270699546726400,2761259683714371584,2893332316235677696-s64max |
| PARAM_VALUE | 0 | rdev->vce.vcpu_bo->tbo.bdev->dev_mapping->host->i_sb->s_export_op->fh_to_parent | 0,5297,148606482432692224,436469935444291584,467281172929331200,529780027764285440,1092893949038768128,1556959531105513472,1608953577475584000,1649536479961075712,2404761408063094784,2970908329832960000,3511613614414655488-s64max |
| PARAM_VALUE | 0 | rdev->vce.vcpu_bo->tbo.bdev->dev_mapping->host->i_sb->s_export_op->get_parent | 0,8931,264940071972966400,291591359766798336,565128213429456896,893189740598853632,1241177127089143808,1474696885321834496,1812477326828269568,1893665921928286208,2210088671756947456,2437012291923775488,2483979068402987008-s64max |
| PARAM_VALUE | 1 | msg | 91,301-302,325-327,351,391-392,410 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| DATA_SOURCE | 1 | msg | $1 |
| HARD_MAX | 1 | msg | 410 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->gart.table_size | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.audio_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.audio_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.dither_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.dither_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.output_csc_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.output_csc_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.tmds_pll_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.tmds_pll_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.tv_std_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.tv_std_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.underscan_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.underscan_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| HALF_LOCKED2 | &rdev->pm.mclk_lock | ||
| HALF_LOCKED2 | &rdev->pm.mutex | ||
| HALF_LOCKED2 | &rdev->ring_lock |
drivers/gpu/drm/radeon/ci_dpm.c ci_start_dpm() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 57,60 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mvdd_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 0,6 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddc_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddci_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->bapm_temp_gradient | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->dte_ambient_temp_base | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_en | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_vddc | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_mawt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_vddc_throttle_release_limit_perc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_waterfall_ctl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageHiSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageLoSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.FuzzyFan_PwmSetDelta | s16min-s16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMaxVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMinVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineEn | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineTrimVddC | 3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineVddC | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_MAWt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_PkgLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_ThrottleReleaseLimitPerc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TdcWaterfallCtl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.Flags | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkDid | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkFrequency | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.AcpLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BAPM_TEMP_GRADIENT | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootMVdd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddc | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddci | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTEAmbientTempBase | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTETjOffset | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DefaultTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsHighT | 45 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsLowT | 30 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjHyst | 8 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjMax | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.LinkLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.ActivityLevel | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DllCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DownH | 100 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MclkPwrmgtCntl | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddci | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllAdFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllDqFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MvddLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeBootLinkLevel | 5,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeGenInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_PkgPwrLimit | 0-16776 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_TemperatureLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SAMUInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SVI2Enable | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SamuLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SclkStepSize | 16384 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskMvddVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddcVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddciVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SystemFlags | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TargetTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitHigh | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitLow | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermGpio | 17 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermalInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UVDInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffset | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffsetVid | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcPhase | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UvdLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VCEInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VceLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcVddciDelta | 4000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddciLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VoltageInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->ulv.supported | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd2 | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidLoSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.VddCVid | 0-255 |
| PARAM_VALUE | 1 | msg | 265 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_start_dpm() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->agp->agp_info.mode | 0 |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 57,60 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dll_default_on | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mvdd_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 0,6 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddc_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddci_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_activity_target | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_edc_enable_threshold | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_edc_wr_enable_threshold | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_strobe_mode_threshold | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mclk_stutter_mode_threshold | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->bapm_temp_gradient | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->dte_ambient_temp_base | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_en | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->svi_load_line_vddc | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_mawt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_vddc_throttle_release_limit_perc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->tdc_waterfall_ctl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageHiSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.BapmVddCBaseLeakageLoSidd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.FuzzyFan_PwmSetDelta | s16min-s16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMaxVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.GnbLPMLMinVid | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineEn | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineTrimVddC | 3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.SviLoadLineVddC | 15 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_MAWt | 25 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_PkgLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TDC_VDDC_ThrottleReleaseLimitPerc | 253 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_powertune_table.TdcWaterfallCtl | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.Flags | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkDid | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkFrequency | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.AcpLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BAPM_TEMP_GRADIENT | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootMVdd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddc | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddci | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTEAmbientTempBase | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTETjOffset | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DefaultTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsHighT | 45 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsLowT | 30 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjHyst | 8 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjMax | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.LinkLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.ActivityLevel | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DllCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DownH | 100 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MclkPwrmgtCntl | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddci | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllAdFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllDqFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MvddLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeBootLinkLevel | 5,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeGenInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_PkgPwrLimit | 0-16776 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_TemperatureLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SAMUInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SVI2Enable | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SamuLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SclkStepSize | 16384 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskMvddVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddcVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddciVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SystemFlags | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TargetTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitHigh | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitLow | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermGpio | 17 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermalInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UVDInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffset | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffsetVid | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcPhase | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UvdLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VCEInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VceLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcVddciDelta | 4000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddciLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VoltageInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->ulv.supported | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data->section->reg_index | 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidHiSidd2 | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.BapmVddCVidLoSidd | 0-255 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_powertune_table.VddCVid | 0-255 |
| PARAM_VALUE | 1 | msg | 310 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_stop_dpm() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->active_auto_throttle_sources | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_ctrl_is_in_default_mode | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->power_containment_features | 0-7 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_power_gated | 0 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | msg | 317 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_stop_dpm() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->active_auto_throttle_sources | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_ctrl_is_in_default_mode | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->power_containment_features | 0-7 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_power_gated | 0 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data->section->reg_index | 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530 |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | msg | 309 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_thermal_enable_alert() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->irq.dpm_thermal | 0 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.thermal.max_temp | 120000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.thermal.min_temp | 90000 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data->section->reg_index | 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530 |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | msg | 266 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->gart.table_size | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_thermal_enable_alert() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->irq.dpm_thermal | 1 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->pm.sysfs_initialized | 1 |
| PARAM_VALUE | 0 | rdev->rlc.cs_data->section->reg_index | 0,40960,41174,41176,41461,41471-41472,41530,41630,41632-41633,41635,41637,41694,41717,62460,65472 |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | msg | 307 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NO_OVERFLOW_SIMPLE | 0 | rdev->gart.table_size | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_unfreeze_sclk_mclk_dpm() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->gart.robj->tbo.bdev->dev_mapping->host->i_sb->s_export_op->encode_fh | 0,2,1398972869330624512,1616549510479982592,2037984473558433792 |
| PARAM_VALUE | 0 | rdev->gart.robj->tbo.bdev->dev_mapping->host->i_sb->s_export_op->fh_to_dentry | 0,8684,447817974243774464,687732489194512384,742201802719268864 |
| PARAM_VALUE | 0 | rdev->gart.robj->tbo.bdev->dev_mapping->host->i_sb->s_export_op->fh_to_parent | 0,5297,148606482432692224,436469935444291584,467281172929331200 |
| PARAM_VALUE | 0 | rdev->gart.robj->tbo.bdev->dev_mapping->host->i_sb->s_export_op->get_parent | 0,8931,264940071972966400,291591359766798336,565128213429456896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.vce_dpm_enable_mask | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->last_mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->need_update_smu7_dpm_table | 0-3,8-11 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VceBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 1-u64max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->uvd_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->vce.vcpu_bo->tbo.bdev->dev_mapping->host->i_sb->s_export_op->encode_fh | 0,2,1398972869330624512,1616549510479982592,2037984473558433792 |
| PARAM_VALUE | 0 | rdev->vce.vcpu_bo->tbo.bdev->dev_mapping->host->i_sb->s_export_op->fh_to_dentry | 0,8684,447817974243774464,687732489194512384,742201802719268864 |
| PARAM_VALUE | 0 | rdev->vce.vcpu_bo->tbo.bdev->dev_mapping->host->i_sb->s_export_op->fh_to_parent | 0,5297,148606482432692224,436469935444291584,467281172929331200 |
| PARAM_VALUE | 0 | rdev->vce.vcpu_bo->tbo.bdev->dev_mapping->host->i_sb->s_export_op->get_parent | 0,8931,264940071972966400,291591359766798336,565128213429456896 |
| PARAM_VALUE | 1 | msg | 394 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| CAPPED_DATA | 0 | rdev->pm.dpm.new_active_crtc_count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ci_dpm.c ci_unfreeze_sclk_mclk_dpm() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->gart.robj->tbo.bdev->dev_mapping->host->i_sb->s_export_op->encode_fh | 0,2,1398972869330624512,1616549510479982592,2037984473558433792 |
| PARAM_VALUE | 0 | rdev->gart.robj->tbo.bdev->dev_mapping->host->i_sb->s_export_op->fh_to_dentry | 0,8684,447817974243774464,687732489194512384,742201802719268864 |
| PARAM_VALUE | 0 | rdev->gart.robj->tbo.bdev->dev_mapping->host->i_sb->s_export_op->fh_to_parent | 0,5297,148606482432692224,436469935444291584,467281172929331200 |
| PARAM_VALUE | 0 | rdev->gart.robj->tbo.bdev->dev_mapping->host->i_sb->s_export_op->get_parent | 0,8931,264940071972966400,291591359766798336,565128213429456896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.vce_dpm_enable_mask | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->last_mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->need_update_smu7_dpm_table | 0-3,8-11 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VceBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 1-u64max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->uvd_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->vce.vcpu_bo->tbo.bdev->dev_mapping->host->i_sb->s_export_op->encode_fh | 0,2,1398972869330624512,1616549510479982592,2037984473558433792 |
| PARAM_VALUE | 0 | rdev->vce.vcpu_bo->tbo.bdev->dev_mapping->host->i_sb->s_export_op->fh_to_dentry | 0,8684,447817974243774464,687732489194512384,742201802719268864 |
| PARAM_VALUE | 0 | rdev->vce.vcpu_bo->tbo.bdev->dev_mapping->host->i_sb->s_export_op->fh_to_parent | 0,5297,148606482432692224,436469935444291584,467281172929331200 |
| PARAM_VALUE | 0 | rdev->vce.vcpu_bo->tbo.bdev->dev_mapping->host->i_sb->s_export_op->get_parent | 0,8931,264940071972966400,291591359766798336,565128213429456896 |
| PARAM_VALUE | 1 | msg | 396 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| CAPPED_DATA | 0 | rdev->pm.dpm.new_active_crtc_count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/ci_smumgr.c ci_send_msg_to_smc_with_parameter() -> ci_send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->device | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->device->adev->mes.saved_flags | 0,2048 |
| PARAM_VALUE | 0 | rdev->device->adev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->device->adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->device->adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | rdev->msg_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->msg_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->msg_lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->msg_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->msg_lock.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->msg_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->msg_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->smumgr_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smumgr_funcs->get_argument | 2509278874041741312,3701709137206763520,4983188556877524992,5120495274662244352,7891631064375181312 |
| PARAM_VALUE | 0 | rdev->smumgr_funcs->send_msg_to_smc_with_parameter | 2491629676455895040,3999427399654572032,6195594507288350720,8319779695402250240,9045420037817864192,9073980815704150016 |
| PARAM_VALUE | 0 | *rdev->device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| DATA_SOURCE | 0 | rdev | $0 |
| DATA_SOURCE | 1 | msg | $1 |
| LOCK2 | 0 | &rdev->msg_lock | |
| TYPE_LOCK | (struct pp_hwmgr)->msg_lock |
drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/smumgr.c smum_send_msg_to_smc() -> (struct pp_smumgr_func)->send_msg_to_smc()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->msg_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->msg_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->msg_lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->msg_lock.first_waiter->task->blocked_on | 0 |
| PARAM_VALUE | 0 | rdev->msg_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->msg_lock.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->msg_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->msg_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->smumgr_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smumgr_funcs->get_argument | 2509278874041741312,3701709137206763520,4983188556877524992,5120495274662244352,7891631064375181312 |
| PARAM_VALUE | 0 | rdev->smumgr_funcs->send_msg_to_smc | 2647764579194744832,3827052580990287872,3955968608809144320,4620885920814133248,7041108290346582016,7884288039496126464 |
| CAPPED_DATA | 0 | &rdev->msg_lock | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| DATA_SOURCE | 1 | msg | $1 |
| CONTAINER | 0 | -64-552+0 | $(-1) |
| LOCK2 | 0 | &rdev->msg_lock | |
| TYPE_LOCK | (struct pp_hwmgr)->msg_lock |