Defined in 2 files as a function:
- drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c, line 1844 (as a function)
- drivers/gpu/drm/radeon/ci_dpm.c, line 4703 (as a function)
Referenced in 2 files:
- drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c, line 2120
- drivers/gpu/drm/radeon/ci_dpm.c, line 5166
Smatch caller information:
drivers/gpu/drm/radeon/ci_dpm.c ci_dpm_enable() -> ci_populate_initial_mc_reg_table()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->agp->agp_info.mode | 0-u32max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 57,60 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.mvdd_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.pcie_speed_table.count | 0,6 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddc_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table.vddci_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dpm_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table.last | 0-16 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table.num_entries | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table.valid_flag | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_performance.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_lane_powersaving.min | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->bapm_temp_gradient | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_defaults->dte_ambient_temp_base | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.CgSpllFuncCntl4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.Flags | 0,2-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkDid | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SclkFrequency | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPILevel.SpllSpreadSpectrum2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ACPInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.AcpLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BAPM_TEMP_GRADIENT | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootMVdd | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddc | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.BootVddci | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTEAmbientTempBase | 20,45,55 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DTETjOffset | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.DefaultTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsHighT | 45 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.FpsLowT | 30 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjHyst | 8 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GpuTjMax | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.GraphicsVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.LinkLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.ActivityLevel | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DllCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.DownH | 100 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MclkPwrmgtCntl | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddc | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddcPhases | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MinVddci | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllAdFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllDqFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllFuncCntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryACPILevel.MpllSs2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryThermThrottleEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MemoryVoltageChangeEnable | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.MvddLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeBootLinkLevel | 5,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PCIeGenInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_PkgPwrLimit | 0-16776 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.PPM_TemperatureLimit | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SAMUInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SVI2Enable | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SamuLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SclkStepSize | 16384 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskMvddVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddcVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SmioMaskVddciVid | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.SystemFlags | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TargetTdp | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitHigh | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.TemperatureLimitLow | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermGpio | 17 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.ThermalInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UVDInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffset | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcOffsetVid | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.Ulv.VddcPhase | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.UvdLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VCEInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VceLevelCount | 1-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddcVddciDelta | 4000 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VddciLevelCount | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_state_table.VoltageInterval | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->ulv.supported | 0 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| HOST_DATA | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->dpm_table_start | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/ci_smumgr.c ci_init_smc_table() -> ci_populate_initial_mc_reg_table()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->adev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->adev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->adev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->adev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->adev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->adev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->adev->mode_info.atom_context->execute_depth | 0-31 |
| PARAM_VALUE | 0 | rdev->adev->pdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->adev->pdev->device | 265,26176-26177,26182-26183,26185,26192-26193,26200,26204-26205 |
| PARAM_VALUE | 0 | rdev->adev->pm.mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->adev->pm.mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | rdev->backend | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->backend->acp_dpm.hard_max_clk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->acp_dpm.hard_min_clk | 0 |
| PARAM_VALUE | 0 | rdev->backend->acp_dpm.soft_max_clk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->acp_dpm.soft_min_clk | 0 |
| PARAM_VALUE | 0 | rdev->backend->acp_power_gated | 0 |
| PARAM_VALUE | 0 | rdev->backend->clock_registers.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->clock_registers.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->clock_registers.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->clock_registers.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->clock_registers.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->clock_registers.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->clock_registers.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->clock_registers.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->clock_registers.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->clock_registers.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->clock_registers.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->clock_registers.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->clock_registers.vMPLL_SS1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->clock_registers.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->display_timing.num_existing_displays | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->display_timing.vrefresh | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->dpm_level_enable_mask.mclk_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->backend->dpm_level_enable_mask.pcie_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->backend->dpm_level_enable_mask.sclk_dpm_enable_mask | 0-3 |
| PARAM_VALUE | 0 | rdev->backend->dpm_level_enable_mask.uvd_dpm_enable_mask | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->dpm_level_enable_mask.vce_dpm_enable_mask | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->dpm_table.mclk_table.count | 0,4,6,8 |
| PARAM_VALUE | 0 | rdev->backend->dpm_table.mvdd_table.count | 0,4,6,8 |
| PARAM_VALUE | 0 | rdev->backend->dpm_table.pcie_speed_table.count | 0,4,6,8 |
| PARAM_VALUE | 0 | rdev->backend->dpm_table.sclk_table.count | 0,4,6,8 |
| PARAM_VALUE | 0 | rdev->backend->dpm_table.vddc_table.count | 0,4,6,8 |
| PARAM_VALUE | 0 | rdev->backend->dpm_table.vddci_table.count | 0,4,6,8 |
| PARAM_VALUE | 0 | rdev->backend->is_memory_gddr5 | 0-1 |
| PARAM_VALUE | 0 | rdev->backend->isp_tileA_power_gated | 1 |
| PARAM_VALUE | 0 | rdev->backend->isp_tileB_power_gated | 1 |
| PARAM_VALUE | 0 | rdev->backend->max_sclk_level | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->mem_latency_high | 45,330 |
| PARAM_VALUE | 0 | rdev->backend->mem_latency_low | 35,330 |
| PARAM_VALUE | 0 | rdev->backend->mvdd_control | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->need_update_smu7_dpm_table | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->odn_dpm_table.max_vddc | 0-u16max |
| PARAM_VALUE | 0 | rdev->backend->odn_dpm_table.min_vddc | 0-u16max |
| PARAM_VALUE | 0 | rdev->backend->pcie_gen_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->backend->pcie_gen_performance.min | 0-65506 |
| PARAM_VALUE | 0 | rdev->backend->pcie_gen_power_saving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->backend->pcie_gen_power_saving.min | 0-65506 |
| PARAM_VALUE | 0 | rdev->backend->pcie_lane_performance.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->backend->pcie_lane_performance.min | 0-65506 |
| PARAM_VALUE | 0 | rdev->backend->pcie_lane_power_saving.max | 0-u16max |
| PARAM_VALUE | 0 | rdev->backend->pcie_lane_power_saving.min | 0-65506 |
| PARAM_VALUE | 0 | rdev->backend->samu_power_gated | 0 |
| PARAM_VALUE | 0 | rdev->backend->sclk_dpm.hard_max_clk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->sclk_dpm.hard_min_clk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->sclk_dpm.soft_max_clk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->sclk_dpm.soft_min_clk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->uvd_dpm.hard_max_clk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->uvd_dpm.hard_min_clk | 0 |
| PARAM_VALUE | 0 | rdev->backend->uvd_dpm.soft_max_clk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->uvd_dpm.soft_min_clk | 0 |
| PARAM_VALUE | 0 | rdev->backend->uvd_power_gated | 0 |
| PARAM_VALUE | 0 | rdev->backend->vce_dpm.hard_max_clk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->vce_dpm.hard_min_clk | 0 |
| PARAM_VALUE | 0 | rdev->backend->vce_dpm.soft_max_clk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->backend->vce_dpm.soft_min_clk | 0 |
| PARAM_VALUE | 0 | rdev->backend->vce_power_gated | 0 |
| PARAM_VALUE | 0 | rdev->backend->vcn_power_gated | 1 |
| PARAM_VALUE | 0 | rdev->backend->voltage_control | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->device | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->device->adev->mes.mutex_hidden.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->device->adev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->device->adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->device->adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | rdev->dyn_state.acp_clock_voltage_dependency_table | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->dyn_state.acp_clock_voltage_dependency_table->count | 0-255 |
| PARAM_VALUE | 0 | rdev->dyn_state.cac_dtp_table | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->dyn_state.uvd_clock_voltage_dependency_table | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->dyn_state.vce_clock_voltage_dependency_table | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->dyn_state.vddc_dependency_on_mclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->dyn_state.vddc_dependency_on_mclk->count | 0-255 |
| PARAM_VALUE | 0 | rdev->dyn_state.vddc_dependency_on_sclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->dyn_state.vddci_dependency_on_mclk->count | 0-255 |
| PARAM_VALUE | 0 | rdev->hwmgr_func | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->hwmgr_func->backend_init | 298865806522781696,2268852976927596544,4613790147379523584,6986837916581347328,7167594031292080128,8267523205528322048 |
| PARAM_VALUE | 0 | rdev->hwmgr_func->dynamic_state_management_enable | 1948303631802679296,2499636406085509120,5884749922054205440,7056320478313332736,7830165595222523904,8232248291769012224 |
| PARAM_VALUE | 0 | rdev->hwmgr_func->get_num_of_pp_table_entries | 0,4287944391702466560,6657887791065190400,7441027435768991744,8747080454393221120 |
| PARAM_VALUE | 0 | rdev->hwmgr_func->get_power_state_size | 0,4432388103156637696,6064772458629373952,6655796427560194048,7650455751667814400 |
| PARAM_VALUE | 0 | rdev->msg_lock->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->msg_lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->msg_lock.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->msg_lock.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->msg_lock.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->msg_lock.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->msg_lock.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->platform_descriptor.platformCaps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm_en | 1 |
| PARAM_VALUE | 0 | rdev->pptable_func->pptable_init | 1520901707310510080,3822322643030208512,4309642798966882304,4627094066790367232,9086924483460136960 |
| PARAM_VALUE | 0 | rdev->smu_backend | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smu_backend->power_tune_defaults | 1976083110847750144,6510831997943861248,8996283363560763392,9009308112770928640 |
| PARAM_VALUE | 0 | rdev->smu_backend->power_tune_defaults->bapm_temp_gradient | 413794,458752,720896 |
| PARAM_VALUE | 0 | rdev->smu_backend->power_tune_defaults->dte_ambient_temp_base | 20,45,55 |
| PARAM_VALUE | 0 | rdev->smu_backend->power_tune_defaults->svi_load_line_en | 1 |
| PARAM_VALUE | 0 | rdev->smu_backend->power_tune_defaults->svi_load_line_vddc | 15 |
| PARAM_VALUE | 0 | rdev->smu_backend->power_tune_defaults->tdc_mawt | 25 |
| PARAM_VALUE | 0 | rdev->smu_backend->power_tune_defaults->tdc_vddc_throttle_release_limit_perc | 253 |
| PARAM_VALUE | 0 | rdev->smu_backend->power_tune_defaults->tdc_waterfall_ctl | 5 |
| PARAM_VALUE | 0 | rdev->smu_backend->smc_state_table.GraphicsBootLevel | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->smu_backend->smc_state_table.GraphicsDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->smu_backend->smc_state_table.LinkLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->smu_backend->smc_state_table.MemoryBootLevel | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->smu_backend->smc_state_table.MemoryDpmLevelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->smu_backend->smc_state_table.UvdBootLevel | 0-254 |
| PARAM_VALUE | 0 | rdev->smu_backend->smc_state_table.VceBootLevel | 0-255 |
| PARAM_VALUE | 0 | rdev->smumgr_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smumgr_funcs->init_smc_table | 2263247745667743744,2442075456761344000,2567760880791375872,3327025976937795584,7194365937537196032,7922679047387136000 |
| PARAM_VALUE | 0 | rdev->smumgr_funcs->initialize_mc_reg_table | 0,1547742608244539392,5296938838159331328,6373260969336365056,6813339989315473408,6881595625574612992 |
| PARAM_VALUE | 0 | rdev->smumgr_funcs->is_dpm_running | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smumgr_funcs->process_firmware_header | 0,1073430395799977984,1692874375929577472,3134302156645031936,3237720534564622336,6002882814709153792,6558504298699870208 |
| PARAM_VALUE | 0 | *rdev->msg_lock.first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | *rdev->platform_descriptor.platformCaps | 4,4294967291 |
| PARAM_VALUE | 0 | *rdev->smu_backend->bif_sclk_table | 0-4294967295 |
| BUF_SIZE | 0 | rdev | 1256,3968 |
| BUF_SIZE | 0 | rdev | 1256,3968 |
| CAPPED_DATA | 0 | rdev->backend->dpm_table.mclk_table.count | 1 |
| CAPPED_DATA | 0 | rdev->backend->dpm_table.pcie_speed_table.count | 1 |
| CAPPED_DATA | 0 | rdev->backend->dpm_table.sclk_table.count | 1 |
| CAPPED_DATA | 0 | rdev->dyn_state.mvdd_dependency_on_mclk->count | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->microcode_version_info.MC | 0-u32max |
| HOST_DATA | 0 | rdev->microcode_version_info.SMC | 0-u32max |
| NO_OVERFLOW_SIMPLE | 0 | rdev->boot_ps->classification.bios_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->current_ps->classification.bios_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->request_ps->classification.bios_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->uvd_ps->classification.bios_index |