ci_patch_with_vddc_leakage identifier - Linux source code next-20260811

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FIXME
- FIXME
  - next-20260811

Defined in 1 files as a function:

drivers/gpu/drm/radeon/ci_dpm.c, line 4907 (as a function)

Referenced in 1 files:

drivers/gpu/drm/radeon/ci_dpm.c

Smatch caller information:

drivers/gpu/drm/radeon/ci_dpm.c ci_patch_cac_leakage_table_with_vddc_leakage() -> ci_patch_with_vddc_leakage()

Type	Parameter	Key	Value
PARAM_VALUE	0	rdev	4096-ptr_max
PARAM_VALUE	0	rdev->pm.dpm.priv	4096-ptr_max
BUF_SIZE	0	rdev	s32min-(-2),1-s32max
BUF_SIZE	0	rdev	s32min-(-2),1-s32max
BUF_SIZE	0	rdev->agp	(-1),144
BUF_SIZE	0	rdev->pm.dpm.priv	5736
CAPPED_DATA	0	rdev->agp->agp_mtrr	1
CAPPED_DATA	0	rdev->mc.aper_base	1
CAPPED_DATA	0	rdev->num_crtc	1
CAPPED_DATA	0	rdev->pdev	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.phase_shedding_limits_table.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.priv->vddc_leakage.count	1
CAPPED_DATA	0	rdev->pm.dpm.priv->vddci_leakage.count	1
DATA_SOURCE	0	rdev	$0
BIT_INFO	0	rdev->family	0x0,0xffff
BIT_INFO	0	rdev->mc.mc_mask	0xffffffff,0xffffffffffffffff
BIT_INFO	0	rdev->vm_manager.max_pfn	0x0,0xfffc0000
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	rdev->gart.num_cpu_pages	0-524287[c]
HOST_DATA	0	rdev->mc.aper_base	0-1099511627775[c]
HOST_DATA	0	rdev->mc.gtt_size	0-s32max[c]
HOST_DATA	0	rdev->mc.gtt_start	0-u64max[c]
HOST_DATA	0	rdev->mc.mc_vram_size	0-4503599626321920
HOST_DATA	0	rdev->mc.real_vram_size	0-4503599626321920
HOST_DATA	0	rdev->mc.vram_end	0-4504699121172479,u64max[c]
HOST_DATA	0	rdev->mc.vram_start	0-9223372036854775807[c]
NO_OVERFLOW_SIMPLE	0	rdev->gart.table_size
NO_OVERFLOW_SIMPLE	0	rdev->pm.current_power_state_index
NO_OVERFLOW_SIMPLE	0	rdev->pm.default_power_state_index
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.phase_shedding_limits_table.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.num_power_states
NO_OVERFLOW_SIMPLE	0	rdev->rmmio_size
LOCK2		&rdev->pm.mutex
TYPE_LOCK		(struct radeon_pm)->mutex

drivers/gpu/drm/radeon/ci_dpm.c ci_patch_clock_voltage_dependency_table_with_vddc_leakage() -> ci_patch_with_vddc_leakage()

Type	Parameter	Key	Value
PARAM_VALUE	0	rdev	4096-ptr_max
PARAM_VALUE	0	rdev->pm.dpm.priv	4096-ptr_max
PARAM_VALUE	1	vddc	4096-ptr_max
BUF_SIZE	0	rdev	s32min-(-2),1-s32max
BUF_SIZE	0	rdev	s32min-(-2),1-s32max
BUF_SIZE	0	rdev->agp	(-1),144
BUF_SIZE	0	rdev->pm.dpm.priv	5736
CAPPED_DATA	0	rdev->agp->agp_mtrr	1
CAPPED_DATA	0	rdev->mc.aper_base	1
CAPPED_DATA	0	rdev->num_crtc	1
CAPPED_DATA	0	rdev->pdev	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.priv->vddc_leakage.count	1
DATA_SOURCE	0	rdev	$0
BIT_INFO	0	rdev->family	0x0,0xffff
BIT_INFO	0	rdev->mc.mc_mask	0xffffffff,0xffffffffffffffff
BIT_INFO	0	rdev->vm_manager.max_pfn	0x0,0xfffc0000
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	rdev->gart.num_cpu_pages	0-524287[c]
HOST_DATA	0	rdev->mc.aper_base	0-1099511627775[c]
HOST_DATA	0	rdev->mc.gtt_size	0-s32max[c]
HOST_DATA	0	rdev->mc.gtt_start	0-u64max[c]
HOST_DATA	0	rdev->mc.mc_vram_size	0-4503599626321920
HOST_DATA	0	rdev->mc.real_vram_size	0-4503599626321920
HOST_DATA	0	rdev->mc.vram_end	0-4504699121172479,u64max[c]
HOST_DATA	0	rdev->mc.vram_start	0-9223372036854775807[c]
NO_OVERFLOW_SIMPLE	0	rdev->gart.table_size
NO_OVERFLOW_SIMPLE	0	rdev->pm.current_power_state_index
NO_OVERFLOW_SIMPLE	0	rdev->pm.default_power_state_index
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.phase_shedding_limits_table.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.num_power_states
NO_OVERFLOW_SIMPLE	0	rdev->rmmio_size
LOCK2		&rdev->pm.mutex
TYPE_LOCK		(struct radeon_pm)->mutex

drivers/gpu/drm/radeon/ci_dpm.c ci_patch_clock_voltage_limits_with_vddc_leakage() -> ci_patch_with_vddc_leakage()

Type	Parameter	Key	Value
PARAM_VALUE	0	rdev	4096-ptr_max
PARAM_VALUE	0	rdev->pm.dpm.priv	4096-ptr_max
PARAM_VALUE	1	vddc	4096-ptr_max
BUF_SIZE	0	rdev	s32min-(-2),1-s32max
BUF_SIZE	0	rdev	s32min-(-2),1-s32max
BUF_SIZE	0	rdev->agp	(-1),144
BUF_SIZE	0	rdev->pm.dpm.priv	5736
CAPPED_DATA	0	rdev->agp->agp_mtrr	1
CAPPED_DATA	0	rdev->mc.aper_base	1
CAPPED_DATA	0	rdev->num_crtc	1
CAPPED_DATA	0	rdev->pdev	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.phase_shedding_limits_table.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.priv->vddc_leakage.count	1
CAPPED_DATA	0	rdev->pm.dpm.priv->vddci_leakage.count	1
DATA_SOURCE	0	rdev	$0
BIT_INFO	0	rdev->family	0x0,0xffff
BIT_INFO	0	rdev->mc.mc_mask	0xffffffff,0xffffffffffffffff
BIT_INFO	0	rdev->vm_manager.max_pfn	0x0,0xfffc0000
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	rdev->gart.num_cpu_pages	0-524287[c]
HOST_DATA	0	rdev->mc.aper_base	0-1099511627775[c]
HOST_DATA	0	rdev->mc.gtt_size	0-s32max[c]
HOST_DATA	0	rdev->mc.gtt_start	0-u64max[c]
HOST_DATA	0	rdev->mc.mc_vram_size	0-4503599626321920
HOST_DATA	0	rdev->mc.real_vram_size	0-4503599626321920
HOST_DATA	0	rdev->mc.vram_end	0-4504699121172479,u64max[c]
HOST_DATA	0	rdev->mc.vram_start	0-9223372036854775807[c]
NO_OVERFLOW_SIMPLE	0	rdev->gart.table_size
NO_OVERFLOW_SIMPLE	0	rdev->pm.current_power_state_index
NO_OVERFLOW_SIMPLE	0	rdev->pm.default_power_state_index
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.phase_shedding_limits_table.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.num_power_states
NO_OVERFLOW_SIMPLE	0	rdev->rmmio_size
LOCK2		&rdev->pm.mutex
TYPE_LOCK		(struct radeon_pm)->mutex

drivers/gpu/drm/radeon/ci_dpm.c ci_patch_uvd_clock_voltage_dependency_table_with_vddc_leakage() -> ci_patch_with_vddc_leakage()

Type	Parameter	Key	Value
PARAM_VALUE	0	rdev	4096-ptr_max
PARAM_VALUE	0	rdev->pm.dpm.priv	4096-ptr_max
PARAM_VALUE	1	vddc	4096-ptr_max
BUF_SIZE	0	rdev	s32min-(-2),1-s32max
BUF_SIZE	0	rdev	s32min-(-2),1-s32max
BUF_SIZE	0	rdev->agp	(-1),144
BUF_SIZE	0	rdev->pm.dpm.priv	5736
CAPPED_DATA	0	rdev->agp->agp_mtrr	1
CAPPED_DATA	0	rdev->mc.aper_base	1
CAPPED_DATA	0	rdev->num_crtc	1
CAPPED_DATA	0	rdev->pdev	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.priv->vddc_leakage.count	1
CAPPED_DATA	0	rdev->pm.dpm.priv->vddci_leakage.count	1
DATA_SOURCE	0	rdev	$0
BIT_INFO	0	rdev->family	0x0,0xffff
BIT_INFO	0	rdev->mc.mc_mask	0xffffffff,0xffffffffffffffff
BIT_INFO	0	rdev->vm_manager.max_pfn	0x0,0xfffc0000
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	rdev->gart.num_cpu_pages	0-524287[c]
HOST_DATA	0	rdev->mc.aper_base	0-1099511627775[c]
HOST_DATA	0	rdev->mc.gtt_size	0-s32max[c]
HOST_DATA	0	rdev->mc.gtt_start	0-u64max[c]
HOST_DATA	0	rdev->mc.mc_vram_size	0-4503599626321920
HOST_DATA	0	rdev->mc.real_vram_size	0-4503599626321920
HOST_DATA	0	rdev->mc.vram_end	0-4504699121172479,u64max[c]
HOST_DATA	0	rdev->mc.vram_start	0-9223372036854775807[c]
NO_OVERFLOW_SIMPLE	0	rdev->gart.table_size
NO_OVERFLOW_SIMPLE	0	rdev->pm.current_power_state_index
NO_OVERFLOW_SIMPLE	0	rdev->pm.default_power_state_index
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.phase_shedding_limits_table.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.num_power_states
NO_OVERFLOW_SIMPLE	0	rdev->rmmio_size
LOCK2		&rdev->pm.mutex
TYPE_LOCK		(struct radeon_pm)->mutex

drivers/gpu/drm/radeon/ci_dpm.c ci_patch_vce_clock_voltage_dependency_table_with_vddc_leakage() -> ci_patch_with_vddc_leakage()

Type	Parameter	Key	Value
PARAM_VALUE	0	rdev	4096-ptr_max
PARAM_VALUE	0	rdev->pm.dpm.priv	4096-ptr_max
PARAM_VALUE	1	vddc	4096-ptr_max
BUF_SIZE	0	rdev	s32min-(-2),1-s32max
BUF_SIZE	0	rdev	s32min-(-2),1-s32max
BUF_SIZE	0	rdev->agp	(-1),144
BUF_SIZE	0	rdev->pm.dpm.priv	5736
CAPPED_DATA	0	rdev->agp->agp_mtrr	1
CAPPED_DATA	0	rdev->mc.aper_base	1
CAPPED_DATA	0	rdev->num_crtc	1
CAPPED_DATA	0	rdev->pdev	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.priv->vddc_leakage.count	1
CAPPED_DATA	0	rdev->pm.dpm.priv->vddci_leakage.count	1
DATA_SOURCE	0	rdev	$0
BIT_INFO	0	rdev->family	0x0,0xffff
BIT_INFO	0	rdev->mc.mc_mask	0xffffffff,0xffffffffffffffff
BIT_INFO	0	rdev->vm_manager.max_pfn	0x0,0xfffc0000
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	rdev->gart.num_cpu_pages	0-524287[c]
HOST_DATA	0	rdev->mc.aper_base	0-1099511627775[c]
HOST_DATA	0	rdev->mc.gtt_size	0-s32max[c]
HOST_DATA	0	rdev->mc.gtt_start	0-u64max[c]
HOST_DATA	0	rdev->mc.mc_vram_size	0-4503599626321920
HOST_DATA	0	rdev->mc.real_vram_size	0-4503599626321920
HOST_DATA	0	rdev->mc.vram_end	0-4504699121172479,u64max[c]
HOST_DATA	0	rdev->mc.vram_start	0-9223372036854775807[c]
NO_OVERFLOW_SIMPLE	0	rdev->gart.table_size
NO_OVERFLOW_SIMPLE	0	rdev->pm.current_power_state_index
NO_OVERFLOW_SIMPLE	0	rdev->pm.default_power_state_index
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.phase_shedding_limits_table.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.num_power_states
NO_OVERFLOW_SIMPLE	0	rdev->rmmio_size
LOCK2		&rdev->pm.mutex
TYPE_LOCK		(struct radeon_pm)->mutex

drivers/gpu/drm/radeon/ci_dpm.c ci_patch_vddc_phase_shed_limit_table_with_vddc_leakage() -> ci_patch_with_vddc_leakage()

Type	Parameter	Key	Value
PARAM_VALUE	0	rdev	4096-ptr_max
PARAM_VALUE	0	rdev->pm.dpm.priv	4096-ptr_max
BUF_SIZE	0	rdev	s32min-(-2),1-s32max
BUF_SIZE	0	rdev	s32min-(-2),1-s32max
BUF_SIZE	0	rdev->agp	(-1),144
BUF_SIZE	0	rdev->pm.dpm.priv	5736
CAPPED_DATA	0	rdev->agp->agp_mtrr	1
CAPPED_DATA	0	rdev->mc.aper_base	1
CAPPED_DATA	0	rdev->num_crtc	1
CAPPED_DATA	0	rdev->pdev	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.count	1
CAPPED_DATA	0	rdev->pm.dpm.priv->vddc_leakage.count	1
CAPPED_DATA	0	rdev->pm.dpm.priv->vddci_leakage.count	1
DATA_SOURCE	0	rdev	$0
BIT_INFO	0	rdev->family	0x0,0xffff
BIT_INFO	0	rdev->mc.mc_mask	0xffffffff,0xffffffffffffffff
BIT_INFO	0	rdev->vm_manager.max_pfn	0x0,0xfffc0000
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	rdev->gart.num_cpu_pages	0-524287[c]
HOST_DATA	0	rdev->mc.aper_base	0-1099511627775[c]
HOST_DATA	0	rdev->mc.gtt_size	0-s32max[c]
HOST_DATA	0	rdev->mc.gtt_start	0-u64max[c]
HOST_DATA	0	rdev->mc.mc_vram_size	0-4503599626321920
HOST_DATA	0	rdev->mc.real_vram_size	0-4503599626321920
HOST_DATA	0	rdev->mc.vram_end	0-4504699121172479,u64max[c]
HOST_DATA	0	rdev->mc.vram_start	0-9223372036854775807[c]
NO_OVERFLOW_SIMPLE	0	rdev->gart.table_size
NO_OVERFLOW_SIMPLE	0	rdev->pm.current_power_state_index
NO_OVERFLOW_SIMPLE	0	rdev->pm.default_power_state_index
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.phase_shedding_limits_table.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.count
NO_OVERFLOW_SIMPLE	0	rdev->pm.num_power_states
NO_OVERFLOW_SIMPLE	0	rdev->rmmio_size
LOCK2		&rdev->pm.mutex
TYPE_LOCK		(struct radeon_pm)->mutex