Defined in 2 files as a function:
- drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c, line 1022 (as a function)
- drivers/gpu/drm/radeon/ci_dpm.c, line 2745 (as a function)
Referenced in 2 files:
- drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c, line 1273
- drivers/gpu/drm/radeon/ci_dpm.c, line 2922
Smatch caller information:
drivers/gpu/drm/radeon/ci_dpm.c ci_populate_single_memory_level() -> ci_calculate_mclk_params()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 1 | memory_clock | 1-u32max |
| PARAM_VALUE | 2 | mclk | 4096-ptr_max |
| PARAM_VALUE | 2 | mclk->DisplayWatermark | 0 |
| PARAM_VALUE | 2 | mclk->DownH | 100 |
| PARAM_VALUE | 2 | mclk->EdcReadEnable | 0-1 |
| PARAM_VALUE | 2 | mclk->EdcWriteEnable | 0-1 |
| PARAM_VALUE | 2 | mclk->EnabledForThrottle | 1 |
| PARAM_VALUE | 2 | mclk->RttEnable | 0 |
| PARAM_VALUE | 2 | mclk->StrobeEnable | 0-1 |
| PARAM_VALUE | 2 | mclk->StrobeRatio | 0-15 |
| PARAM_VALUE | 2 | mclk->StutterEnable | 0-1 |
| PARAM_VALUE | 2 | mclk->UpH | 0 |
| PARAM_VALUE | 2 | mclk->VoltageDownH | 0 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->dpm_table.mclk_table.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->dpm_table.sclk_table.count | 1 |
| CAPPED_DATA | 1 | memory_clock | 1 |
| CAPPED_DATA | 2 | mclk->StrobeRatio | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| DATA_SOURCE | 1 | memory_clock | $1 |
| DATA_SOURCE | 2 | mclk | $2 |
| FUZZY_MAX | 2 | mclk->EdcReadEnable | 1 |
| FUZZY_MAX | 2 | mclk->EdcWriteEnable | 1 |
| FUZZY_MAX | 2 | mclk->StrobeEnable | 1 |
| FUZZY_MAX | 2 | mclk->StutterEnable | 1 |
| HARD_MAX | 2 | mclk->EdcReadEnable | 1 |
| HARD_MAX | 2 | mclk->EdcWriteEnable | 1 |
| HARD_MAX | 2 | mclk->StutterEnable | 1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->gart.table_size | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.audio_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.audio_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.dither_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.dither_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.output_csc_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.output_csc_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.tmds_pll_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.tmds_pll_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.tv_std_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.tv_std_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.underscan_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.underscan_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| LOCK2 | &rdev->pm.mutex | ||
| HALF_LOCKED2 | &rdev->pm.mclk_lock | ||
| HALF_LOCKED2 | &rdev->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/ci_smumgr.c ci_populate_single_memory_level() -> ci_calculate_mclk_params()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->backend | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->backend->need_update_smu7_dpm_table | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->display_config | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->dyn_state.acp_clock_voltage_dependency_table->count | 0-255 |
| PARAM_VALUE | 0 | rdev->dyn_state.mvdd_dependency_on_mclk->count | 1-u32max |
| PARAM_VALUE | 0 | rdev->dyn_state.vdd_gfx_dependency_on_sclk->count | 0-255 |
| PARAM_VALUE | 0 | rdev->dyn_state.vddc_dependency_on_mclk->count | 1-u32max |
| PARAM_VALUE | 0 | rdev->dyn_state.vddci_dependency_on_mclk->count | 1-u32max |
| PARAM_VALUE | 0 | rdev->hwmgr_func | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->hwmgr_func->apply_state_adjust_rules | 0,3621754790451118080,4846802892409925632,6527931433430638592,8609074455165775872 |
| PARAM_VALUE | 0 | rdev->hwmgr_func->backend_init | 298865806522781696,2268852976927596544,4613790147379523584,6986837916581347328,7167594031292080128,8267523205528322048 |
| PARAM_VALUE | 0 | rdev->hwmgr_func->check_states_equal | 0,1278940444229279744,8160345853938163712 |
| PARAM_VALUE | 0 | rdev->hwmgr_func->disable_smc_firmware_ctf | 0,320402144971874304,4235145329258029056,5340594925240430592,8565130193669922816 |
| PARAM_VALUE | 0 | rdev->hwmgr_func->dynamic_state_management_enable | 1948303631802679296,2499636406085509120,5884749922054205440,7056320478313332736,7830165595222523904,8232248291769012224 |
| PARAM_VALUE | 0 | rdev->hwmgr_func->get_num_of_pp_table_entries | 0,4287944391702466560,6657887791065190400,7441027435768991744,8747080454393221120 |
| PARAM_VALUE | 0 | rdev->hwmgr_func->get_power_state_size | 0,4432388103156637696,6064772458629373952,6655796427560194048,7650455751667814400 |
| PARAM_VALUE | 0 | rdev->hwmgr_func->power_state_set | 0,2133207948760264704,5834734302683639808,6703590888639741952,8265213932899078144 |
| PARAM_VALUE | 0 | rdev->hwmgr_func->set_cpu_power_state | 0,5856536315792371712,9134132896884461568 |
| PARAM_VALUE | 0 | rdev->hwmgr_func->stop_thermal_controller | 0,1506093590029230080,3693573413439086592,5406745503785533440,5881162152740569088 |
| PARAM_VALUE | 0 | rdev->platform_descriptor.platformCaps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pptable_func->pptable_init | 1520901707310510080,3822322643030208512,4309642798966882304,4627094066790367232,9086924483460136960 |
| PARAM_VALUE | 0 | rdev->smu_backend | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smumgr_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smumgr_funcs->init_smc_table | 0,2263247745667743744,2442075456761344000,2567760880791375872,3327025976937795584,7194365937537196032,7922679047387136000 |
| PARAM_VALUE | 0 | rdev->smumgr_funcs->initialize_mc_reg_table | 0,1547742608244539392,5296938838159331328,6373260969336365056,6813339989315473408,6881595625574612992 |
| PARAM_VALUE | 0 | rdev->smumgr_funcs->is_dpm_running | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smumgr_funcs->populate_all_graphic_levels | 0,1342659546856378368,2810308295633297408,4578303506712002560,5749654951643373568,6425997491624054784,8524758741288955904 |
| PARAM_VALUE | 0 | rdev->smumgr_funcs->populate_all_memory_levels | 0,2255817984216195072,3146157505423319040,4910895057439354880,5373417275991633920,5600069224676499456,7660171168860049408 |
| PARAM_VALUE | 0 | rdev->smumgr_funcs->process_firmware_header | 0,1073430395799977984,1692874375929577472,3134302156645031936,3237720534564622336,6002882814709153792,6558504298699870208 |
| PARAM_VALUE | 0 | *rdev->platform_descriptor.platformCaps | 0-4294967295 |
| PARAM_VALUE | 1 | memory_clock | 1-u32max |
| PARAM_VALUE | 2 | mclk | 4096-ptr_max |
| PARAM_VALUE | 2 | mclk->DisplayWatermark | 0 |
| PARAM_VALUE | 2 | mclk->EdcReadEnable | 0-1 |
| PARAM_VALUE | 2 | mclk->EdcWriteEnable | 0-1 |
| PARAM_VALUE | 2 | mclk->EnabledForActivity | 0 |
| PARAM_VALUE | 2 | mclk->EnabledForThrottle | 1 |
| PARAM_VALUE | 2 | mclk->RttEnable | 0 |
| PARAM_VALUE | 2 | mclk->StrobeEnable | 0-1 |
| PARAM_VALUE | 2 | mclk->StrobeRatio | 0-15 |
| PARAM_VALUE | 2 | mclk->StutterEnable | 0 |
| PARAM_VALUE | 2 | mclk->VoltageDownH | 0 |
| BUF_SIZE | 0 | rdev | (-1),1-u16max |
| BUF_SIZE | 0 | rdev | (-1),1-u16max |
| CAPPED_DATA | 0 | rdev->dyn_state.vddc_dependency_on_sclk->count | 1 |
| CAPPED_DATA | 1 | memory_clock | 1 |
| CAPPED_DATA | 2 | mclk->StrobeRatio | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| DATA_SOURCE | 1 | memory_clock | $1 |
| DATA_SOURCE | 2 | mclk | $2 |
| FUZZY_MAX | 2 | mclk->EdcReadEnable | 1 |
| FUZZY_MAX | 2 | mclk->EdcWriteEnable | 1 |
| FUZZY_MAX | 2 | mclk->StrobeEnable | 1 |
| HARD_MAX | 2 | mclk->EdcReadEnable | 1 |
| HARD_MAX | 2 | mclk->EdcWriteEnable | 1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->microcode_version_info.MC | 0-u32max |
| HOST_DATA | 0 | rdev->microcode_version_info.SMC | 0-u32max |
| NO_OVERFLOW_SIMPLE | 0 | rdev->boot_ps->classification.bios_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->current_ps->classification.bios_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->request_ps->classification.bios_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->uvd_ps->classification.bios_index |