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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/gma500/cdv_intel_display.c cdv_intel_crtc_mode_set() -> cdv_dpll_set_clock_cdv()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->driver 4096-ptr_max
PARAM_VALUE 1 crtc 4096-ptr_max
PARAM_VALUE 1 crtc->dev 4096-ptr_max
PARAM_VALUE 1 crtc->dev->driver 4096-ptr_max
PARAM_VALUE 1 crtc->dev->mode_config.funcs->atomic_commit 0,1709437739929436160,3385958169767186432,9025212985888776192
PARAM_VALUE 1 crtc->enabled 1
PARAM_VALUE 1 crtc->funcs->cursor_set 0,3495628013979901952,4537023485923934208,6131130537578876928,8872617624633417728
PARAM_VALUE 1 crtc->funcs->cursor_set2 0,1789627235925843968,4458553803064295424,6181444555894923264,8421415535485173760
PARAM_VALUE 1 crtc->helper_private->atomic_begin 0,218,4096-ptr_max
PARAM_VALUE 1 crtc->helper_private->commit 0,4,4096-ptr_max
PARAM_VALUE 1 crtc->helper_private->disable 0,4,4096-ptr_max
PARAM_VALUE 1 crtc->helper_private->dpms 0,4096-ptr_max
PARAM_VALUE 1 crtc->helper_private->mode_fixup 0,4096-ptr_max
PARAM_VALUE 1 crtc->helper_private->mode_set 0,263,4096-ptr_max
PARAM_VALUE 1 crtc->helper_private->mode_set_base 0,575,4096-ptr_max
PARAM_VALUE 1 crtc->helper_private->mode_valid 0,13,4096-ptr_max
PARAM_VALUE 1 crtc->helper_private->prepare 0,2,4096-ptr_max
PARAM_VALUE 2 clock 965821120667787264
PARAM_VALUE 2 clock->dot 0-3600000
PARAM_VALUE 2 clock->m 0,2-21600012
PARAM_VALUE 2 clock->m1 0-3600000
PARAM_VALUE 2 clock->m2 0-3600000
PARAM_VALUE 2 clock->n 0-3600000
PARAM_VALUE 2 clock->p 0-50400000
PARAM_VALUE 2 clock->p1 0-3600000
PARAM_VALUE 2 clock->p2 0,5,7,10,14
PARAM_VALUE 2 clock->vco 0-3600000
CAPPED_DATA 1 crtc 1
DATA_SOURCE 1 crtc $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
USER_DATA 1 crtc->hwmode.crtc_clock s32min-s32max[c]
USER_DATA 1 crtc->hwmode.crtc_hblank_end 1-u16max[c]
USER_DATA 1 crtc->hwmode.crtc_hblank_start 1-u16max[c]
USER_DATA 1 crtc->hwmode.crtc_hdisplay 1-u16max[c]
USER_DATA 1 crtc->hwmode.crtc_hskew 0-u16max[u]
USER_DATA 1 crtc->hwmode.crtc_hsync_end 1-u16max[c]
USER_DATA 1 crtc->hwmode.crtc_hsync_start 1-u16max[c]
USER_DATA 1 crtc->hwmode.crtc_htotal 1-u16max[c]
USER_DATA 1 crtc->hwmode.crtc_vblank_end 0-u16max
USER_DATA 1 crtc->hwmode.crtc_vdisplay 0-u16max
USER_DATA 1 crtc->hwmode.crtc_vsync_end 0-u16max
USER_DATA 1 crtc->hwmode.crtc_vsync_start 0-u16max
USER_DATA 1 crtc->hwmode.crtc_vtotal 0-u16max
USER_DATA 1 crtc->hwmode.hskew 0-u16max[u]
USER_DATA 1 crtc->hwmode.type 0,8-104[c]
USER_DATA 1 crtc->hwmode.vscan 0-u16max[u]
USER_DATA 1 crtc->x 0-s32max
USER_DATA 1 crtc->y 0-s32max
NO_OVERFLOW_SIMPLE 1 crtc->hwmode.clock
NO_OVERFLOW_SIMPLE 1 crtc->mode.clock
UNITS 0 dev unit_byte