Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 2 files:
Smatch caller information:
drivers/gpu/drm/radeon/btc_dpm.c btc_apply_state_adjust_rules() -> btc_skip_blacklist_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_ps.dc_compatible | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.caps | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.class | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.class2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.dclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.ecclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.evclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.vce_active | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.vce_level | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.vclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 3 | sclk | 4096-ptr_max |
| PARAM_VALUE | 4 | mclk | 4096-ptr_max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| FUZZY_MAX | 0 | rdev->pm.dpm.new_active_crtc_count | 2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/btc_dpm.c btc_apply_state_adjust_rules() -> btc_skip_blacklist_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_ps.dc_compatible | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.caps | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.class | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.class2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.dclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.ecclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.evclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.vce_active | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.vce_level | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.vclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 3 | sclk | 4096-ptr_max |
| PARAM_VALUE | 4 | mclk | 4096-ptr_max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| FUZZY_MAX | 0 | rdev->pm.dpm.new_active_crtc_count | 2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/btc_dpm.c btc_apply_state_adjust_rules() -> btc_skip_blacklist_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_ps.dc_compatible | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.caps | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.class | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.class2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.dclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.ecclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.evclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.vce_active | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.vce_level | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.vclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 3 | sclk | 4096-ptr_max |
| PARAM_VALUE | 4 | mclk | 4096-ptr_max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| FUZZY_MAX | 0 | rdev->pm.dpm.new_active_crtc_count | 2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/btc_dpm.c btc_skip_blacklist_clocks() -> btc_skip_blacklist_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | max_sclk | 1-u32max |
| PARAM_VALUE | 3 | sclk | 4096-ptr_max |
| PARAM_VALUE | 3 | *sclk | 0-4294967294 |
| PARAM_VALUE | 4 | mclk | 4096-ptr_max |
| PARAM_VALUE | 4 | *mclk | 30000 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 1 | max_sclk | 1 |
| CAPPED_DATA | 3 | *sclk | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| DATA_SOURCE | 1 | max_sclk | $1 |
| DATA_SOURCE | 2 | max_mclk | $2 |
| DATA_SOURCE | 3 | sclk | $3 |
| DATA_SOURCE | 4 | mclk | $4 |
| PARAM_COMPARE | 3 | *sclk | < $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.audio_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.audio_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.dither_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.dither_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.output_csc_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.output_csc_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.tmds_pll_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.tmds_pll_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.tv_std_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.tv_std_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.underscan_property->dev->num_crtcs | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->mode_info.underscan_property->num_values | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| HALF_LOCKED2 | &rdev->pm.mclk_lock | ||
| HALF_LOCKED2 | &rdev->pm.mutex | ||
| HALF_LOCKED2 | &rdev->ring_lock |
drivers/gpu/drm/radeon/ni_dpm.c ni_apply_state_adjust_rules() -> btc_skip_blacklist_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.caps | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.class | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.class2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.dclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.ecclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.evclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.vce_active | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.vce_level | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.vclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 4 | mclk | 4096-ptr_max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| FUZZY_MAX | 0 | rdev->pm.dpm.new_active_crtc_count | 2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ni_dpm.c ni_apply_state_adjust_rules() -> btc_skip_blacklist_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.caps | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.class | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.class2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.dclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.ecclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.evclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.vce_active | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.vce_level | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->requested_rps.vclk | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 4 | mclk | 4096-ptr_max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| FUZZY_MAX | 0 | rdev->pm.dpm.new_active_crtc_count | 2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |