Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/net/wireless/broadcom/b43/main.c b43_dummy_transmission() -> b43_ram_write()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->dev 4096-ptr_max
PARAM_VALUE 0 dev->phy.g->lo_control->bbatt_list.len 0,9
PARAM_VALUE 0 dev->phy.g->lo_control->bbatt_list.list 0,144726016315772928
PARAM_VALUE 0 dev->phy.g->lo_control->bbatt_list.max_val 0,8
PARAM_VALUE 0 dev->phy.g->lo_control->rfatt_list.len 0,7,14
PARAM_VALUE 0 dev->phy.g->lo_control->rfatt_list.list 0,3019603989279825920,3594635489906069504,7596049338479575040
PARAM_VALUE 0 dev->phy.g->lo_control->rfatt_list.max_val 0,9,14
PARAM_VALUE 0 dev->phy.n->iqcal_chanspec_2G.channel_type 0-3
PARAM_VALUE 0 dev->phy.n->iqcal_chanspec_5G.channel_type 0-3
PARAM_VALUE 0 dev->phy.n->rssical_chanspec_2G.channel_type 0-3
PARAM_VALUE 0 dev->phy.n->rssical_chanspec_5G.channel_type 0-3
PARAM_VALUE 0 dev->phy.n->txiqlocal_chanspec.channel_type 0-3
PARAM_VALUE 0 dev->phy.ops 4096-ptr_max
PARAM_VALUE 0 dev->phy.ops->exit 0,4096-ptr_max
PARAM_VALUE 0 dev->phy.ops->free 4096-ptr_max
PARAM_VALUE 0 dev->phy.ops->init 4096-ptr_max
PARAM_VALUE 0 dev->phy.ops->interf_mitigation 0,2964835975055155200
PARAM_VALUE 0 dev->phy.ops->phy_read 0,5297716836743749632
PARAM_VALUE 0 dev->phy.ops->phy_write 0,1091963287703642112
PARAM_VALUE 0 dev->phy.ops->prepare_hardware 0,6979433902616084480
PARAM_VALUE 0 dev->phy.ops->pwork_15sec 0,6625170843647389696,8126706791943991296
PARAM_VALUE 0 dev->phy.ops->pwork_60sec 0,2897385623538446336,7752225136358871040
PARAM_VALUE 0 dev->phy.ops->radio_read 4096-ptr_max
PARAM_VALUE 0 dev->phy.ops->radio_write 4096-ptr_max
PARAM_VALUE 0 dev->phy.ops->software_rfkill 4096-ptr_max
PARAM_VALUE 0 dev->phy.ops->supports_hwpctl 0,6418794505410142208
PARAM_VALUE 0 dev->phy.ops->switch_analog 4096-ptr_max
PARAM_VALUE 0 *dev->dma_reason 0-4294967295
PARAM_VALUE 0 *dev->phy.g->lo_control->dc_lt 0-u16max
PARAM_VALUE 0 *dev->phy.g->minlowsig 0-u16max
PARAM_VALUE 0 *dev->phy.g->nrssi s16min-s16max
PARAM_VALUE 0 *dev->phy.g->nrssi_lt (-128)-127
PARAM_VALUE 1 offset 0-16
BUF_SIZE 0 dev (-1),24,1864,5184
BUF_SIZE 0 dev (-1),24,1864,5184
DATA_SOURCE 0 dev $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 dev->fw.patch 0-u16max
HOST_DATA 0 dev->phy.analog 0-15[c]
HOST_DATA 0 dev->phy.g->cur_idle_tssi 0-u16max
HOST_DATA 0 dev->phy.g->initval 32-543[c]
HOST_DATA 0 dev->phy.g->lo_control->power_vector 1-u16max[c]
HOST_DATA 0 dev->phy.g->nrssislope (-4194304)-(-66576),66576-4194304[c]
HOST_DATA 0 dev->phy.g->radio_off_context.rfover 0-u16max
HOST_DATA 0 dev->phy.g->radio_off_context.rfoverval 0-u16max
HOST_DATA 0 dev->phy.gmode 0-1
HOST_DATA 0 dev->phy.radio_rev 0-255
HOST_DATA 0 dev->phy.radio_ver 0-u16max
HOST_DATA 0 dev->phy.supports_2ghz 0-1
HOST_DATA 0 dev->phy.supports_5ghz 0-1
HOST_DATA 0 dev->phy.type 2,4-5,7[c]
HALF_LOCKED2 &wl->mutex
HALF_LOCKED2 0 &dev->wl->mutex

drivers/net/wireless/broadcom/b43/main.c b43_write_mac_bssid_templates() -> b43_ram_write()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->dev 4096-ptr_max
PARAM_VALUE 0 dev->dev->write16 4096-ptr_max
PARAM_VALUE 0 dev->phy.g->lo_control->bbatt_list.len 9
PARAM_VALUE 0 dev->phy.g->lo_control->bbatt_list.list 144726016315772928
PARAM_VALUE 0 dev->phy.g->lo_control->bbatt_list.max_val 8
PARAM_VALUE 0 dev->phy.g->lo_control->rfatt_list.len 7,14
PARAM_VALUE 0 dev->phy.g->lo_control->rfatt_list.list 3019603989279825920,3594635489906069504,7596049338479575040
PARAM_VALUE 0 dev->phy.g->lo_control->rfatt_list.max_val 9,14
PARAM_VALUE 0 dev->phy.n->iqcal_chanspec_2G.channel_type 0-3
PARAM_VALUE 0 dev->phy.n->iqcal_chanspec_5G.channel_type 0-3
PARAM_VALUE 0 dev->phy.n->rssical_chanspec_2G.channel_type 0-3
PARAM_VALUE 0 dev->phy.n->rssical_chanspec_5G.channel_type 0-3
PARAM_VALUE 0 dev->phy.n->txiqlocal_chanspec.channel_type 0-3
PARAM_VALUE 0 dev->phy.ops->prepare_hardware 0,6979433902616084480
PARAM_VALUE 0 dev->wl 4096-ptr_max
PARAM_VALUE 0 *dev->dma_reason 0-4294967295
PARAM_VALUE 0 *dev->phy.g->lo_control->dc_lt 0-u16max
PARAM_VALUE 0 *dev->phy.g->minlowsig 0-u16max
PARAM_VALUE 0 *dev->phy.g->nrssi s16min-s16max
PARAM_VALUE 0 *dev->phy.g->nrssi_lt (-128)-127
PARAM_VALUE 0 *dev->phy.n->adj_pwr_tbl 0-u16max
PARAM_VALUE 0 *dev->phy.n->mphase_txcal_bestcoeffs 0-u16max
PARAM_VALUE 0 *dev->phy.n->tx_rx_cal_radio_saveregs 0-u16max
PARAM_VALUE 0 *dev->phy.n->txiqlocal_bestc 0-u16max
PARAM_VALUE 0 *dev->wl->hw->wiphy->fw_version 0-255
PARAM_VALUE 1 offset 32,36-43
DATA_SOURCE 0 dev $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 dev->dma.rx_ring->dev->fw.patch 0-u16max
HOST_DATA 0 dev->dma.rx_ring->dev->phy.analog 0-15[c]
HOST_DATA 0 dev->dma.rx_ring->dev->phy.gmode 0-1
HOST_DATA 0 dev->dma.rx_ring->dev->phy.radio_rev 0-255
HOST_DATA 0 dev->dma.rx_ring->dev->phy.radio_ver 0-u16max
HOST_DATA 0 dev->dma.rx_ring->dev->phy.supports_2ghz 0-1
HOST_DATA 0 dev->dma.rx_ring->dev->phy.supports_5ghz 0-1
HOST_DATA 0 dev->dma.rx_ring->dev->phy.type 2,4-5,7[c]
HOST_DATA 0 dev->dma.tx_ring_AC_BE->dev->fw.patch 0-u16max
HOST_DATA 0 dev->dma.tx_ring_AC_BE->dev->phy.analog 0-15[c]
HOST_DATA 0 dev->dma.tx_ring_AC_BE->dev->phy.gmode 0-1
HOST_DATA 0 dev->dma.tx_ring_AC_BE->dev->phy.radio_rev 0-255
HOST_DATA 0 dev->dma.tx_ring_AC_BE->dev->phy.radio_ver 0-u16max
HOST_DATA 0 dev->dma.tx_ring_AC_BE->dev->phy.supports_2ghz 0-1
HOST_DATA 0 dev->dma.tx_ring_AC_BE->dev->phy.supports_5ghz 0-1
HOST_DATA 0 dev->dma.tx_ring_AC_BE->dev->phy.type 2,4-5,7[c]
HOST_DATA 0 dev->dma.tx_ring_AC_BK->dev->fw.patch 0-u16max
HOST_DATA 0 dev->dma.tx_ring_AC_BK->dev->phy.analog 0-15[c]
HOST_DATA 0 dev->dma.tx_ring_AC_BK->dev->phy.gmode 0-1
HOST_DATA 0 dev->dma.tx_ring_AC_BK->dev->phy.radio_rev 0-255
HOST_DATA 0 dev->dma.tx_ring_AC_BK->dev->phy.radio_ver 0-u16max
HOST_DATA 0 dev->dma.tx_ring_AC_BK->dev->phy.supports_2ghz 0-1
HOST_DATA 0 dev->dma.tx_ring_AC_BK->dev->phy.supports_5ghz 0-1
HOST_DATA 0 dev->dma.tx_ring_AC_BK->dev->phy.type 2,4-5,7[c]
HOST_DATA 0 dev->dma.tx_ring_AC_VI->dev->fw.patch 0-u16max
HOST_DATA 0 dev->dma.tx_ring_AC_VI->dev->phy.analog 0-15[c]
HOST_DATA 0 dev->dma.tx_ring_AC_VI->dev->phy.gmode 0-1
HOST_DATA 0 dev->dma.tx_ring_AC_VI->dev->phy.radio_rev 0-255
HOST_DATA 0 dev->dma.tx_ring_AC_VI->dev->phy.radio_ver 0-u16max
HOST_DATA 0 dev->dma.tx_ring_AC_VI->dev->phy.supports_2ghz 0-1
HOST_DATA 0 dev->dma.tx_ring_AC_VI->dev->phy.supports_5ghz 0-1
HOST_DATA 0 dev->dma.tx_ring_AC_VI->dev->phy.type 2,4-5,7[c]
HOST_DATA 0 dev->dma.tx_ring_AC_VO->dev->fw.patch 0-u16max
HOST_DATA 0 dev->dma.tx_ring_AC_VO->dev->phy.analog 0-15[c]
HOST_DATA 0 dev->dma.tx_ring_AC_VO->dev->phy.gmode 0-1
HOST_DATA 0 dev->dma.tx_ring_AC_VO->dev->phy.radio_rev 0-255
HOST_DATA 0 dev->dma.tx_ring_AC_VO->dev->phy.radio_ver 0-u16max
HOST_DATA 0 dev->dma.tx_ring_AC_VO->dev->phy.supports_2ghz 0-1
HOST_DATA 0 dev->dma.tx_ring_AC_VO->dev->phy.supports_5ghz 0-1
HOST_DATA 0 dev->dma.tx_ring_AC_VO->dev->phy.type 2,4-5,7[c]
HOST_DATA 0 dev->dma.tx_ring_mcast->dev->fw.patch 0-u16max
HOST_DATA 0 dev->dma.tx_ring_mcast->dev->phy.analog 0-15[c]
HOST_DATA 0 dev->dma.tx_ring_mcast->dev->phy.gmode 0-1
HOST_DATA 0 dev->dma.tx_ring_mcast->dev->phy.radio_rev 0-255
HOST_DATA 0 dev->dma.tx_ring_mcast->dev->phy.radio_ver 0-u16max
HOST_DATA 0 dev->dma.tx_ring_mcast->dev->phy.supports_2ghz 0-1
HOST_DATA 0 dev->dma.tx_ring_mcast->dev->phy.supports_5ghz 0-1
HOST_DATA 0 dev->dma.tx_ring_mcast->dev->phy.type 2,4-5,7[c]
HOST_DATA 0 dev->fw.patch 0-u16max
HOST_DATA 0 dev->phy.analog 0-15[c]
HOST_DATA 0 dev->phy.g->cur_idle_tssi 0-u16max
HOST_DATA 0 dev->phy.g->initval 32-543[c]
HOST_DATA 0 dev->phy.g->lo_control->power_vector 1-u16max[c]
HOST_DATA 0 dev->phy.g->nrssislope (-4194304)-(-66576),66576-4194304[c]
HOST_DATA 0 dev->phy.g->radio_off_context.rfover 0-u16max
HOST_DATA 0 dev->phy.g->radio_off_context.rfoverval 0-u16max
HOST_DATA 0 dev->phy.gmode 0-1
HOST_DATA 0 dev->phy.n->classifier_state 0-7[c]
HOST_DATA 0 dev->phy.n->rfctrl_intc1_save 0-u16max
HOST_DATA 0 dev->phy.n->rfctrl_intc2_save 0-u16max
HOST_DATA 0 dev->phy.radio_rev 0-255
HOST_DATA 0 dev->phy.radio_ver 0-u16max
HOST_DATA 0 dev->phy.supports_2ghz 0-1
HOST_DATA 0 dev->phy.supports_5ghz 0-1
HOST_DATA 0 dev->phy.type 2,4-5,7[c]
HOST_DATA 0 dev->pio.rx_queue->dev->fw.patch 0-u16max
HOST_DATA 0 dev->pio.rx_queue->dev->phy.analog 0-15[c]
HOST_DATA 0 dev->pio.rx_queue->dev->phy.gmode 0-1
HOST_DATA 0 dev->pio.rx_queue->dev->phy.radio_rev 0-255
HOST_DATA 0 dev->pio.rx_queue->dev->phy.radio_ver 0-u16max
HOST_DATA 0 dev->pio.rx_queue->dev->phy.supports_2ghz 0-1
HOST_DATA 0 dev->pio.rx_queue->dev->phy.supports_5ghz 0-1
HOST_DATA 0 dev->pio.rx_queue->dev->phy.type 2,4-5,7[c]
HOST_DATA 0 dev->pio.tx_queue_AC_BE->buffer_size 0-u16max
HOST_DATA 0 dev->pio.tx_queue_AC_BE->dev->fw.patch 0-u16max
HOST_DATA 0 dev->pio.tx_queue_AC_BE->dev->phy.analog 0-15[c]
HOST_DATA 0 dev->pio.tx_queue_AC_BE->dev->phy.gmode 0-1
HOST_DATA 0 dev->pio.tx_queue_AC_BE->dev->phy.radio_rev 0-255
HOST_DATA 0 dev->pio.tx_queue_AC_BE->dev->phy.radio_ver 0-u16max
HOST_DATA 0 dev->pio.tx_queue_AC_BE->dev->phy.supports_2ghz 0-1
HOST_DATA 0 dev->pio.tx_queue_AC_BE->dev->phy.supports_5ghz 0-1
HOST_DATA 0 dev->pio.tx_queue_AC_BE->dev->phy.type 2,4-5,7[c]
HOST_DATA 0 dev->pio.tx_queue_AC_BK->buffer_size 0-u16max
HOST_DATA 0 dev->pio.tx_queue_AC_BK->dev->fw.patch 0-u16max
HOST_DATA 0 dev->pio.tx_queue_AC_BK->dev->phy.analog 0-15[c]
HOST_DATA 0 dev->pio.tx_queue_AC_BK->dev->phy.gmode 0-1
HOST_DATA 0 dev->pio.tx_queue_AC_BK->dev->phy.radio_rev 0-255
HOST_DATA 0 dev->pio.tx_queue_AC_BK->dev->phy.radio_ver 0-u16max
HOST_DATA 0 dev->pio.tx_queue_AC_BK->dev->phy.supports_2ghz 0-1
HOST_DATA 0 dev->pio.tx_queue_AC_BK->dev->phy.supports_5ghz 0-1
HOST_DATA 0 dev->pio.tx_queue_AC_BK->dev->phy.type 2,4-5,7[c]
HOST_DATA 0 dev->pio.tx_queue_AC_VI->buffer_size 0-u16max
HOST_DATA 0 dev->pio.tx_queue_AC_VI->dev->fw.patch 0-u16max
HOST_DATA 0 dev->pio.tx_queue_AC_VI->dev->phy.analog 0-15[c]
HOST_DATA 0 dev->pio.tx_queue_AC_VI->dev->phy.gmode 0-1
HOST_DATA 0 dev->pio.tx_queue_AC_VI->dev->phy.radio_rev 0-255
HOST_DATA 0 dev->pio.tx_queue_AC_VI->dev->phy.radio_ver 0-u16max
HOST_DATA 0 dev->pio.tx_queue_AC_VI->dev->phy.supports_2ghz 0-1
HOST_DATA 0 dev->pio.tx_queue_AC_VI->dev->phy.supports_5ghz 0-1
HOST_DATA 0 dev->pio.tx_queue_AC_VI->dev->phy.type 2,4-5,7[c]
HOST_DATA 0 dev->pio.tx_queue_AC_VO->buffer_size 0-u16max
HOST_DATA 0 dev->pio.tx_queue_AC_VO->dev->fw.patch 0-u16max
HOST_DATA 0 dev->pio.tx_queue_AC_VO->dev->phy.analog 0-15[c]
HOST_DATA 0 dev->pio.tx_queue_AC_VO->dev->phy.gmode 0-1
HOST_DATA 0 dev->pio.tx_queue_AC_VO->dev->phy.radio_rev 0-255
HOST_DATA 0 dev->pio.tx_queue_AC_VO->dev->phy.radio_ver 0-u16max
HOST_DATA 0 dev->pio.tx_queue_AC_VO->dev->phy.supports_2ghz 0-1
HOST_DATA 0 dev->pio.tx_queue_AC_VO->dev->phy.supports_5ghz 0-1
HOST_DATA 0 dev->pio.tx_queue_AC_VO->dev->phy.type 2,4-5,7[c]
HOST_DATA 0 dev->pio.tx_queue_mcast->buffer_size 0-u16max
HOST_DATA 0 dev->pio.tx_queue_mcast->dev->fw.patch 0-u16max
HOST_DATA 0 dev->pio.tx_queue_mcast->dev->phy.analog 0-15[c]
HOST_DATA 0 dev->pio.tx_queue_mcast->dev->phy.gmode 0-1
HOST_DATA 0 dev->pio.tx_queue_mcast->dev->phy.radio_rev 0-255
HOST_DATA 0 dev->pio.tx_queue_mcast->dev->phy.radio_ver 0-u16max
HOST_DATA 0 dev->pio.tx_queue_mcast->dev->phy.supports_2ghz 0-1
HOST_DATA 0 dev->pio.tx_queue_mcast->dev->phy.supports_5ghz 0-1
HOST_DATA 0 dev->pio.tx_queue_mcast->dev->phy.type 2,4-5,7[c]
UNITS 0 dev unit_byte
UNITS 1 offset unit_byte
LOCK2 &wl->mutex
TYPE_LOCK (struct b43_wl)->mutex

drivers/net/wireless/broadcom/b43/main.c b43_write_template_common() -> b43_ram_write()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->__init_status.counter 1-s32max
PARAM_VALUE 0 dev->dev 4096-ptr_max
PARAM_VALUE 0 dev->dev->read32 4096-ptr_max
PARAM_VALUE 0 dev->wl 4096-ptr_max
PARAM_VALUE 0 dev->wl->beacon_lock.rlock.dep_map->name 0-255
PARAM_VALUE 0 dev->wl->beacon_templates_virgin 0
PARAM_VALUE 0 dev->wl->current_beacon 4096-ptr_max
PARAM_VALUE 0 dev->wl->current_beacon->cloned 1
PARAM_VALUE 0 dev->wl->current_beacon->data 4096-ptr_max
PARAM_VALUE 0 dev->wl->current_beacon->head 1-u64max
PARAM_VALUE 0 dev->wl->if_type 1,3,7
PARAM_VALUE 0 dev->wl->operating 1
PARAM_VALUE 1 offset 104,1128
DATA_SOURCE 0 dev $0
DATA_SOURCE 1 offset $3
BIT_INFO 0 dev->irq_mask 0x0,0xfffffffd
HARD_MAX 1 offset 1128
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &wl->mutex
HALF_LOCKED2 0 &dev->wl->mutex
TYPE_LOCK (struct b43_wl)->mutex

drivers/net/wireless/broadcom/b43/main.c b43_write_template_common() -> b43_ram_write()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->__init_status.counter 1-s32max
PARAM_VALUE 0 dev->dev 4096-ptr_max
PARAM_VALUE 0 dev->dev->read32 4096-ptr_max
PARAM_VALUE 0 dev->dev->write32 4096-ptr_max
PARAM_VALUE 0 dev->wl 4096-ptr_max
PARAM_VALUE 0 dev->wl->beacon_lock.rlock.dep_map->name 0-255
PARAM_VALUE 0 dev->wl->beacon_templates_virgin 0
PARAM_VALUE 0 dev->wl->current_beacon 4096-ptr_max
PARAM_VALUE 0 dev->wl->current_beacon->cloned 1
PARAM_VALUE 0 dev->wl->current_beacon->data 4096-ptr_max
PARAM_VALUE 0 dev->wl->current_beacon->head 1-u64max
PARAM_VALUE 0 dev->wl->if_type 1,3,7
PARAM_VALUE 0 dev->wl->operating 1
PARAM_VALUE 1 offset 108,1132
DATA_SOURCE 0 dev $0
DATA_SOURCE 1 offset $3 [m]
BIT_INFO 0 dev->irq_mask 0x0,0xfffffffd
BIT_INFO 2 val 0x0,0xffff0000
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
USER_DATA 2 val 0-u32max[c]
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &wl->mutex
HALF_LOCKED2 0 &dev->wl->mutex
TYPE_LOCK (struct b43_wl)->mutex

drivers/net/wireless/broadcom/b43/main.c b43_write_template_common() -> b43_ram_write()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->__init_status.counter 1-s32max
PARAM_VALUE 0 dev->dev 4096-ptr_max
PARAM_VALUE 0 dev->dev->read32 4096-ptr_max
PARAM_VALUE 0 dev->dev->write32 4096-ptr_max
PARAM_VALUE 0 dev->wl 4096-ptr_max
PARAM_VALUE 0 dev->wl->beacon_lock.rlock.dep_map->name 0-255
PARAM_VALUE 0 dev->wl->beacon_templates_virgin 0
PARAM_VALUE 0 dev->wl->current_beacon 4096-ptr_max
PARAM_VALUE 0 dev->wl->current_beacon->cloned 1
PARAM_VALUE 0 dev->wl->current_beacon->data 4096-ptr_max
PARAM_VALUE 0 dev->wl->current_beacon->head 1-u64max
PARAM_VALUE 0 dev->wl->if_type 1,3,7
PARAM_VALUE 0 dev->wl->operating 1
PARAM_VALUE 1 offset 112,116-615,1136,1140-1639
DATA_SOURCE 0 dev $0
BIT_INFO 0 dev->irq_mask 0x0,0xfffffffd
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
USER_DATA 2 val 0-u32max
UNITS 1 offset unit_byte
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &wl->mutex
HALF_LOCKED2 0 &dev->wl->mutex
TYPE_LOCK (struct b43_wl)->mutex