| PARAM_VALUE |
0 |
sc |
4096-ptr_max |
| PARAM_VALUE |
1 |
active |
0 |
| DATA_SOURCE |
0 |
sc |
$0 |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| HOST_DATA |
0 |
sc->cur_chan->last_beacon |
0-u32max |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.cycpwrThr1 |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.cycpwrThr1Ext |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.firstep |
0-63[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.firstepLow |
0-63[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m1Thresh |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m1ThreshExt |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m1ThreshLow |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m1ThreshLowExt |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2CountThr |
0-31[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2CountThrLow |
0-63[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2Thresh |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2ThreshExt |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2ThreshLow |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2ThreshLowExt |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->btcoex_hw.aic.aic_cal_start_time |
0-u32max |
| HOST_DATA |
0 |
sc->sc_ah->btcoex_hw.mci.gpm_idx |
0-u16max[c] |
| HOST_DATA |
0 |
sc->sc_ah->btcoex_hw.mci.last_recovery |
0-u32max |
| HOST_DATA |
0 |
sc->sc_ah->msi_reg |
0-u32max |
| HOST_DATA |
0 |
sc->sc_ah->pacal_info.prev_offset |
1-127[c] |
| HOST_DATA |
0 |
sc->sched.next_tbtt |
0-u32max |
| NO_OVERFLOW_SIMPLE |
0 |
sc->offchannel.scan_req->n_channels |
|
| HALF_LOCKED2 |
0 |
&sc->mutex |
|
