| PARAM_VALUE |
0 |
sc |
4096-ptr_max |
| PARAM_VALUE |
0 |
sc->hw_check_work.timer.entry->pprev |
4096-ptr_max |
| PARAM_VALUE |
0 |
sc->hw_pll_work.timer.entry->pprev |
4096-ptr_max |
| PARAM_VALUE |
0 |
sc->mutex.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
sc->mutex.first_waiter |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
sc->mutex.first_waiter->list.prev->next |
5159360019465732096 |
| PARAM_VALUE |
0 |
sc->mutex.osq.tail.counter |
0-s32max |
| PARAM_VALUE |
0 |
sc->mutex.wait_lock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
sc->mutex.wait_lock.owner |
(-1) |
| PARAM_VALUE |
0 |
sc->mutex.wait_lock.owner_cpu |
u32max |
| PARAM_VALUE |
0 |
sc->sc_ah |
4096-ptr_max |
| PARAM_VALUE |
0 |
sc->sc_ah->btcoex_hw.aic.aic_cal_state |
0-3 |
| PARAM_VALUE |
0 |
sc->sc_ah->btcoex_hw.aic.aic_enabled |
1 |
| PARAM_VALUE |
0 |
sc->sc_ah->btcoex_hw.mci.bt_state |
0-1 |
| PARAM_VALUE |
0 |
sc->sc_ah->chip_fullsleep |
1 |
| PARAM_VALUE |
0 |
sc->sc_ah->imask |
0-2147483646,2147483648-u32max |
| PARAM_VALUE |
0 |
sc->sc_ah->msi_mask |
0-1,6-7 |
| PARAM_VALUE |
0 |
sc->sc_ah->power_mode |
0 |
| PARAM_VALUE |
0 |
sc->sc_ah->reg_ops.read |
4096-ptr_max |
| PARAM_VALUE |
0 |
sc->sc_ah->reg_ops.rmw |
4096-ptr_max |
| PARAM_VALUE |
0 |
sc->sc_ah->reg_ops.write |
4096-ptr_max |
| PARAM_VALUE |
0 |
sc->sc_ah->wow.wow_event_mask |
0 |
| PARAM_VALUE |
0 |
sc->sc_ah->wow.wow_event_mask2 |
0 |
| PARAM_VALUE |
0 |
sc->sc_pcu_lock.rlock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
sc->sc_pm_lock.rlock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
sc->wow_intr_before_sleep |
0-2147483646,2147483648-u32max |
| CAPPED_DATA |
0 |
&sc->mutex |
1 |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| NOCHECK_CALL |
|
|
|
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.cycpwrThr1 |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.cycpwrThr1Ext |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.firstep |
0-63[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.firstepLow |
0-63[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m1Thresh |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m1ThreshExt |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m1ThreshLow |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m1ThreshLowExt |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2CountThr |
0-31[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2CountThrLow |
0-63[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2Thresh |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2ThreshExt |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2ThreshLow |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2ThreshLowExt |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->btcoex_hw.aic.aic_cal_start_time |
0-u32max |
| HOST_DATA |
0 |
sc->sc_ah->btcoex_hw.mci.gpm_idx |
0-u16max[c] |
| HOST_DATA |
0 |
sc->sc_ah->btcoex_hw.mci.last_recovery |
0-u32max |
| HOST_DATA |
0 |
sc->sc_ah->msi_reg |
0-u32max |
| HOST_DATA |
0 |
sc->sc_ah->pacal_info.prev_offset |
1-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->tx_trig_level |
0-63[c] |
| LOCK2 |
|
global &rtnl_mutex |
|
| LOCK2 |
0 |
&sc->mutex |
|
| HALF_LOCKED2 |
|
&local->hw.wiphy->mtx |
|
| HALF_LOCKED2 |
|
&rdev->wiphy.mtx |
|
| TYPE_LOCK |
|
(struct ath_softc)->mutex |
|
| TYPE_LOCK |
|
(struct wiphy)->mtx |
|