| PARAM_VALUE |
0 |
sc |
4096-ptr_max |
| PARAM_VALUE |
0 |
sc->beacon.beaconq |
0-15 |
| PARAM_VALUE |
0 |
sc->beacon.tx_processed |
1 |
| PARAM_VALUE |
0 |
sc->gtt_cnt |
0 |
| PARAM_VALUE |
0 |
sc->intr_lock.rlock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
sc->intrstatus |
0 |
| PARAM_VALUE |
0 |
sc->sc_ah |
4096-ptr_max |
| PARAM_VALUE |
0 |
sc->sc_ah->btcoex_hw.aic.aic_enabled |
1 |
| PARAM_VALUE |
0 |
sc->sc_ah->btcoex_hw.mci.bt_state |
0-1 |
| PARAM_VALUE |
0 |
sc->sc_ah->btcoex_hw.mci.ready |
0 |
| PARAM_VALUE |
0 |
sc->sc_ah->caps.hw_caps |
16-u32max |
| PARAM_VALUE |
0 |
sc->sc_ah->chip_fullsleep |
1 |
| PARAM_VALUE |
0 |
sc->sc_ah->config.hw_hang_checks |
1-u16max |
| PARAM_VALUE |
0 |
sc->sc_ah->power_mode |
0 |
| PARAM_VALUE |
0 |
sc->sc_ah->tx_trig_level |
0-64 |
| PARAM_VALUE |
0 |
sc->sc_pcu_lock.rlock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
sc->sc_pm_lock.rlock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
sc->sleep_timer.entry.pprev |
0 |
| PARAM_VALUE |
0 |
*sc->sc_ah->btcoex_hw.aic->aic_sram |
0-4294967295 |
| CAPPED_DATA |
0 |
sc->beacon.beaconq |
1 |
| DATA_SOURCE |
0 |
sc |
$0 |
| PREEMPT_ADD |
|
|
|
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| NOCHECK_CALL |
|
|
|
| HOST_DATA |
0 |
sc->cur_chan->last_beacon |
0-u32max |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.cycpwrThr1 |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.cycpwrThr1Ext |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.firstep |
0-63[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.firstepLow |
0-63[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m1Thresh |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m1ThreshExt |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m1ThreshLow |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m1ThreshLowExt |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2CountThr |
0-31[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2CountThrLow |
0-63[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2Thresh |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2ThreshExt |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2ThreshLow |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->ani.iniDef.m2ThreshLowExt |
0-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->btcoex_hw.aic.aic_cal_start_time |
0-u32max |
| HOST_DATA |
0 |
sc->sc_ah->btcoex_hw.mci.gpm_idx |
0-u16max[c] |
| HOST_DATA |
0 |
sc->sc_ah->btcoex_hw.mci.last_recovery |
0-u32max |
| HOST_DATA |
0 |
sc->sc_ah->msi_reg |
0-u32max |
| HOST_DATA |
0 |
sc->sc_ah->pacal_info.prev_offset |
1-127[c] |
| HOST_DATA |
0 |
sc->sc_ah->tx_trig_level |
0-63[c] |
| HOST_DATA |
0 |
sc->sched.next_tbtt |
0-u32max |
| LOCK2 |
|
rcu_read |
|
| LOCK2 |
0 |
&sc->sc_pcu_lock |
|
| TYPE_LOCK |
|
(struct ath_softc)->sc_pcu_lock |
|