Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.c amdgpu_ring_mux_end_ib() -> amdgpu_ring_mux_sw_entry()

Type Parameter Key Value
PARAM_VALUE 0 mux 4096-ptr_max
PARAM_VALUE 1 ring 4096-ptr_max
BUF_SIZE 0 mux 208
BUF_SIZE 1 ring (-1),1360,85680,87040
BUF_SIZE 1 ring (-1),1360,85680,87040
DATA_SOURCE 0 mux $0
DATA_SOURCE 1 ring $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.c amdgpu_ring_mux_get_rptr() -> amdgpu_ring_mux_sw_entry()

Type Parameter Key Value
PARAM_VALUE 0 mux 4096-ptr_max
PARAM_VALUE 1 ring 4096-ptr_max
BUF_SIZE 0 mux 208
BUF_SIZE 1 ring s32min-(-1),1-s32max
BUF_SIZE 1 ring s32min-(-1),1-s32max
DATA_SOURCE 0 mux $0
DATA_SOURCE 1 ring $1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 1 ring->count_dw 0-s32max[c]
HOST_DATA 1 ring->wptr 0-u32max
HOST_DATA 1 ring->wptr_old 0-u32max
HALF_LOCKED2 &ring->adev->cper.ring_lock
HALF_LOCKED2 &sdma_instance->engine_reset_mutex

drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.c amdgpu_ring_mux_get_wptr() -> amdgpu_ring_mux_sw_entry()

Type Parameter Key Value
PARAM_VALUE 0 mux 4096-ptr_max
PARAM_VALUE 1 ring 4096-ptr_max
BUF_SIZE 0 mux 208
BUF_SIZE 1 ring s32min-(-1),1-s32max
BUF_SIZE 1 ring s32min-(-1),1-s32max
DATA_SOURCE 0 mux $0
DATA_SOURCE 1 ring $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &ring->adev->cper.ring_lock

drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.c amdgpu_ring_mux_ib_mark_offset() -> amdgpu_ring_mux_sw_entry()

Type Parameter Key Value
PARAM_VALUE 0 mux 4096-ptr_max
PARAM_VALUE 1 ring 4096-ptr_max
BUF_SIZE 0 mux 208
BUF_SIZE 1 ring (-1),1360,85680,87040
BUF_SIZE 1 ring (-1),1360,85680,87040
DATA_SOURCE 0 mux $0
DATA_SOURCE 1 ring $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.c amdgpu_ring_mux_set_wptr() -> amdgpu_ring_mux_sw_entry()

Type Parameter Key Value
PARAM_VALUE 0 mux 4096-ptr_max
PARAM_VALUE 1 ring 4096-ptr_max
BUF_SIZE 0 mux 208
BUF_SIZE 1 ring (-1),1360,2720,4080,13600,21760,85680,87040
BUF_SIZE 1 ring (-1),1360,2720,4080,13600,21760,85680,87040
DATA_SOURCE 0 mux $0
DATA_SOURCE 1 ring $1
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 1 ring->count_dw 0-s32max[c]
HOST_DATA 1 ring->wptr 0-u32max
HOST_DATA 1 ring->wptr_old 0-u32max
LOCK2 0 &mux->lock
HALF_LOCKED2 &adev->gfx.gpu_clock_mutex
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &adev->srbm_mutex
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 &mux->lock
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 flags
HALF_LOCKED2 global &drm_unplug_srcu
HALF_LOCKED2 ring_lock
TYPE_LOCK (struct amdgpu_ring_mux)->lock

drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.c amdgpu_ring_mux_start_ib() -> amdgpu_ring_mux_sw_entry()

Type Parameter Key Value
PARAM_VALUE 0 mux 4096-ptr_max
PARAM_VALUE 1 ring 4096-ptr_max
BUF_SIZE 0 mux 208
BUF_SIZE 1 ring (-1),1360,85680,87040
BUF_SIZE 1 ring (-1),1360,85680,87040
DATA_SOURCE 0 mux $0
DATA_SOURCE 1 ring $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.c scan_and_remove_signaled_chunk() -> amdgpu_ring_mux_sw_entry()

Type Parameter Key Value
PARAM_VALUE 0 mux 4096-ptr_max
PARAM_VALUE 0 mux->ring_entry_size 1-u32max
PARAM_VALUE 1 ring 4096-ptr_max
PARAM_VALUE 1 ring->entry_index 0-4294967294
BUF_SIZE 0 mux 208
BUF_SIZE 1 ring (-1),1360,85680,87040
BUF_SIZE 1 ring (-1),1360,85680,87040
CAPPED_DATA 0 mux->ring_entry_size 1
CAPPED_DATA 1 ring->entry_index 1
DATA_SOURCE 0 mux $0
DATA_SOURCE 1 ring $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dqm->lock_hidden