Documented in 1 files:
Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 30 files:
- drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c, line 101
- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
- drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
- drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
- drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
- drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
- drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
- drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
- drivers/gpu/drm/amd/amdgpu/mes_v11_0.c, line 120
- drivers/gpu/drm/amd/amdgpu/mes_v12_0.c, line 93
- drivers/gpu/drm/amd/amdgpu/mes_v12_1.c, line 96
- drivers/gpu/drm/amd/amdgpu/si_dma.c, line 755
- drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c, line 1582
- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c, line 1592
- drivers/gpu/drm/amd/amdgpu/vce_v1_0.c, line 821
- drivers/gpu/drm/amd/amdgpu/vce_v2_0.c, line 659
- drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
- drivers/gpu/drm/amd/amdgpu/vce_v4_0.c, line 849
- drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c, line 2170
- drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c, line 2165
- drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c, line 1897
- drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
- drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
- drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c, line 1812
- drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c, line 1503
- drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
- drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c, line 1456
- drivers/gpu/drm/amd/amdgpu/vcn_v5_0_2.c, line 1014
Smatch caller information:
19f4aff6129bc862 gfx_v9_ring_insert_nop() -> amdgpu_ring_insert_nop()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ring | 4096-ptr_max |
| PARAM_VALUE | 0 | ring->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | ring->ring | 4096-ptr_max |
| BUF_SIZE | 0 | ring | (-1),1360,2720,4080,13600,21760,85680,87040 |
| BUF_SIZE | 0 | ring | (-1),1360,2720,4080,13600,21760,85680,87040 |
| DATA_SOURCE | 0 | ring | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | ring->wptr | 0-u32max[c] |
| HOST_DATA | 0 | ring->wptr_old | 0-u32max |
| HALF_LOCKED2 | &adev->gfx.gpu_clock_mutex | ||
| HALF_LOCKED2 | &adev->reset_domain->sem | ||
| HALF_LOCKED2 | &adev->srbm_mutex | ||
| HALF_LOCKED2 | &kiq->ring_lock | ||
| HALF_LOCKED2 | &mux->lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | flags | ||
| HALF_LOCKED2 | global &drm_unplug_srcu | ||
| HALF_LOCKED2 | ring_lock |
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c gfx_v9_4_3_ring_insert_nop() -> amdgpu_ring_insert_nop()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ring | 4096-ptr_max |
| PARAM_VALUE | 0 | ring->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | ring->ring | 4096-ptr_max |
| BUF_SIZE | 0 | ring | (-1),1360,2720,4080,13600,21760,85680,87040 |
| BUF_SIZE | 0 | ring | (-1),1360,2720,4080,13600,21760,85680,87040 |
| DATA_SOURCE | 0 | ring | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | ring->wptr | 0-u32max[c] |
| HOST_DATA | 0 | ring->wptr_old | 0-u32max |
| HALF_LOCKED2 | &adev->gfx.gpu_clock_mutex | ||
| HALF_LOCKED2 | &adev->reset_domain->sem | ||
| HALF_LOCKED2 | &adev->srbm_mutex | ||
| HALF_LOCKED2 | &kiq->ring_lock | ||
| HALF_LOCKED2 | &mux->lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | flags | ||
| HALF_LOCKED2 | global &drm_unplug_srcu | ||
| HALF_LOCKED2 | ring_lock |
2424e8ec9bf51854 gfx_v12_ring_insert_nop() -> amdgpu_ring_insert_nop()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ring | 4096-ptr_max |
| PARAM_VALUE | 0 | ring->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | ring->ring | 4096-ptr_max |
| BUF_SIZE | 0 | ring | (-1),1360,2720,4080,13600,21760,85680,87040 |
| BUF_SIZE | 0 | ring | (-1),1360,2720,4080,13600,21760,85680,87040 |
| DATA_SOURCE | 0 | ring | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | ring->wptr | 0-u32max[c] |
| HOST_DATA | 0 | ring->wptr_old | 0-u32max |
| HALF_LOCKED2 | &adev->gfx.gpu_clock_mutex | ||
| HALF_LOCKED2 | &adev->reset_domain->sem | ||
| HALF_LOCKED2 | &adev->srbm_mutex | ||
| HALF_LOCKED2 | &kiq->ring_lock | ||
| HALF_LOCKED2 | &mux->lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | flags | ||
| HALF_LOCKED2 | global &drm_unplug_srcu | ||
| HALF_LOCKED2 | ring_lock |
28ad57647bf6154f gfx_v11_ring_insert_nop() -> amdgpu_ring_insert_nop()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ring | 4096-ptr_max |
| PARAM_VALUE | 0 | ring->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | ring->ring | 4096-ptr_max |
| BUF_SIZE | 0 | ring | (-1),1360,2720,4080,13600,21760,85680,87040 |
| BUF_SIZE | 0 | ring | (-1),1360,2720,4080,13600,21760,85680,87040 |
| DATA_SOURCE | 0 | ring | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | ring->wptr | 0-u32max[c] |
| HOST_DATA | 0 | ring->wptr_old | 0-u32max |
| HALF_LOCKED2 | &adev->gfx.gpu_clock_mutex | ||
| HALF_LOCKED2 | &adev->reset_domain->sem | ||
| HALF_LOCKED2 | &adev->srbm_mutex | ||
| HALF_LOCKED2 | &kiq->ring_lock | ||
| HALF_LOCKED2 | &mux->lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | flags | ||
| HALF_LOCKED2 | global &drm_unplug_srcu | ||
| HALF_LOCKED2 | ring_lock |
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_ring_insert_nop() -> amdgpu_ring_insert_nop()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ring | 4096-ptr_max |
| PARAM_VALUE | 0 | ring->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | ring->ring | 4096-ptr_max |
| BUF_SIZE | 0 | ring | (-1),1360,2720,4080,13600,21760,85680,87040 |
| BUF_SIZE | 0 | ring | (-1),1360,2720,4080,13600,21760,85680,87040 |
| DATA_SOURCE | 0 | ring | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | ring->wptr | 0-u32max[c] |
| HOST_DATA | 0 | ring->wptr_old | 0-u32max |
| HALF_LOCKED2 | &adev->gfx.gpu_clock_mutex | ||
| HALF_LOCKED2 | &adev->reset_domain->sem | ||
| HALF_LOCKED2 | &adev->srbm_mutex | ||
| HALF_LOCKED2 | &kiq->ring_lock | ||
| HALF_LOCKED2 | &mux->lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | flags | ||
| HALF_LOCKED2 | global &drm_unplug_srcu | ||
| HALF_LOCKED2 | ring_lock |
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c amdgpu_ring_commit() -> (struct amdgpu_ring_funcs)->insert_nop()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ring | 4096-ptr_max |
| PARAM_VALUE | 0 | ring->adev->gfx.funcs->get_hdp_flush_mask | 0,1294107431044386816,7035510910386749440,8166760959833321472 |
| PARAM_VALUE | 0 | ring->adev->gfx.rlc.cs_data->section->reg_index | 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530,41630,41632-41633,41635,41637-41638,41694,41701,41717,41920,62460,65472 |
| PARAM_VALUE | 0 | ring->adev->gfx.rlc.reg_funcs->rreg32 | 4096-ptr_max |
| PARAM_VALUE | 0 | ring->adev->mes.funcs->reset_hw_queue | 4096-ptr_max |
| PARAM_VALUE | 0 | ring->adev->nbio.hdp_flush_reg->ref_and_mask_cp8 | 256 |
| PARAM_VALUE | 0 | ring->adev->nbio.hdp_flush_reg->ref_and_mask_cp9 | 512 |
| PARAM_VALUE | 0 | ring->adev->nbio.hdp_flush_reg->ref_and_mask_sdma0 | 1024 |
| PARAM_VALUE | 0 | ring->adev->nbio.hdp_flush_reg->ref_and_mask_sdma1 | 2048 |
| PARAM_VALUE | 0 | ring->adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | ring->adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | ring->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | count | 1-u32max |
| BUF_SIZE | 0 | ring | (-1),1360,2720,4080,13600,21760,87040 |
| BUF_SIZE | 0 | ring | (-1),1360,2720,4080,13600,21760,87040 |
| DATA_SOURCE | 0 | ring | $0 |
| CONTAINER | 0 | -136-8+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | ring->count_dw | 0-s32max[c] |
| HOST_DATA | 0 | ring->wptr | 0-u32max |
| HOST_DATA | 0 | ring->wptr_old | 0-u32max |
| HALF_LOCKED2 | &adev->reset_domain->sem | ||
| HALF_LOCKED2 | &adev->srbm_mutex | ||
| HALF_LOCKED2 | &kiq->ring_lock | ||
| HALF_LOCKED2 | &mux->lock | ||
| HALF_LOCKED2 | flags | ||
| HALF_LOCKED2 | global &drm_unplug_srcu | ||
| HALF_LOCKED2 | ring_lock |