Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 4 files:
- drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c, line 155
- drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c, line 6846
- drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c, line 5280
- drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c, line 479
Smatch caller information:
2424e8ec9bf51854 gfx_v12_0_reset_kcq() -> amdgpu_gfx_reset_mes_compute()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 1 | ring | 7179262252779036432 |
| PARAM_VALUE | 1 | ring->adev | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->sched.pause_submit | 1 |
| PARAM_VALUE | 3 | uq | 0 |
| PARAM_VALUE | 4 | hung_queue_count | 0 |
| PARAM_VALUE | 5 | faulty_queue_input | 0 |
| DATA_SOURCE | 1 | ring | $0 |
| DATA_SOURCE | 2 | guilty_fence | $2 |
| LOCK2 | global &drm_unplug_srcu | ||
| HALF_LOCKED2 | &pool->lock |
28ad57647bf6154f gfx_v11_0_reset_kcq() -> amdgpu_gfx_reset_mes_compute()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 1 | ring | 7179262252779036432 |
| PARAM_VALUE | 1 | ring->adev | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | ring->sched.pause_submit | 1 |
| PARAM_VALUE | 3 | uq | 0 |
| PARAM_VALUE | 4 | hung_queue_count | 0 |
| PARAM_VALUE | 5 | faulty_queue_input | 0 |
| DATA_SOURCE | 1 | ring | $0 |
| DATA_SOURCE | 2 | guilty_fence | $2 |
| LOCK2 | global &drm_unplug_srcu | ||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c amdgpu_userq_hang_detect_work() -> amdgpu_gfx_reset_mes_compute()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->debug_disable_gpu_ring_reset | 0 |
| PARAM_VALUE | 0 | adev->gfx.compute_supported_reset | 4-u32max |
| PARAM_VALUE | 0 | adev->userq_funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | ring | 0 |
| PARAM_VALUE | 2 | guilty_fence | 0 |
| PARAM_VALUE | 3 | uq | 4096-ptr_max |
| PARAM_VALUE | 3 | uq->queue_type | 1 |
| PARAM_VALUE | 3 | uq->userq_mgr | 4096-ptr_max |
| PARAM_VALUE | 3 | uq->userq_mgr->adev->gfx.compute_supported_reset | 4-u32max |
| PARAM_VALUE | 3 | uq->vm | 0,4096-ptr_max |
| PARAM_VALUE | 4 | hung_queue_count | 0 |
| PARAM_VALUE | 5 | faulty_queue_input | 0 |
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c reset_queues_mes() -> amdgpu_gfx_reset_mes_compute()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 1 | ring | 0 |
| PARAM_VALUE | 2 | guilty_fence | 0 |
| PARAM_VALUE | 3 | uq | 0 |
| PARAM_VALUE | 4 | hung_queue_count | 7731181087771144192 |
| PARAM_VALUE | 4 | *hung_queue_count | 0 |
| PARAM_VALUE | 5 | faulty_queue_input | 6064655727753588736 |
| BUF_SIZE | 5 | faulty_queue_input | 32 |
| MEM_ZERO | 5 | faulty_queue_input | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dqm->lock_hidden | ||
| TYPE_LOCK | (struct device_queue_manager)->lock_hidden |