Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 3 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/tests/amdgpu_dm_freesync_test.c dm_test_timing_unchanged_clock_changed() -> amdgpu_dm_is_timing_unchanged_for_freesync()

Type Parameter Key Value
PARAM_VALUE 0 old_crtc_state 7127427513966977024
PARAM_VALUE 0 old_crtc_state->mode.clock 148500
PARAM_VALUE 0 old_crtc_state->mode.hdisplay 0
PARAM_VALUE 0 old_crtc_state->mode.hskew 0
PARAM_VALUE 0 old_crtc_state->mode.hsync_end 0
PARAM_VALUE 0 old_crtc_state->mode.hsync_start 0
PARAM_VALUE 0 old_crtc_state->mode.htotal 2200
PARAM_VALUE 0 old_crtc_state->mode.vdisplay 0
PARAM_VALUE 0 old_crtc_state->mode.vscan 0
PARAM_VALUE 0 old_crtc_state->mode.vsync_end 1089
PARAM_VALUE 0 old_crtc_state->mode.vsync_start 1084
PARAM_VALUE 0 old_crtc_state->mode.vtotal 1125
PARAM_VALUE 1 new_crtc_state 5488367022013378560
PARAM_VALUE 1 new_crtc_state->mode.clock 297000
PARAM_VALUE 1 new_crtc_state->mode.hdisplay 0
PARAM_VALUE 1 new_crtc_state->mode.hskew 0
PARAM_VALUE 1 new_crtc_state->mode.hsync_end 0
PARAM_VALUE 1 new_crtc_state->mode.hsync_start 0
PARAM_VALUE 1 new_crtc_state->mode.htotal 2200
PARAM_VALUE 1 new_crtc_state->mode.vdisplay 0
PARAM_VALUE 1 new_crtc_state->mode.vscan 0
PARAM_VALUE 1 new_crtc_state->mode.vsync_end 1214
PARAM_VALUE 1 new_crtc_state->mode.vsync_start 1209
PARAM_VALUE 1 new_crtc_state->mode.vtotal 1250

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/tests/amdgpu_dm_freesync_test.c dm_test_timing_unchanged_identical_modes() -> amdgpu_dm_is_timing_unchanged_for_freesync()

Type Parameter Key Value
PARAM_VALUE 0 old_crtc_state 3392746231676297216
PARAM_VALUE 0 old_crtc_state->mode.clock 148500
PARAM_VALUE 0 old_crtc_state->mode.hdisplay 1920
PARAM_VALUE 0 old_crtc_state->mode.hskew 0
PARAM_VALUE 0 old_crtc_state->mode.hsync_end 0
PARAM_VALUE 0 old_crtc_state->mode.hsync_start 0
PARAM_VALUE 0 old_crtc_state->mode.htotal 2200
PARAM_VALUE 0 old_crtc_state->mode.vdisplay 1080
PARAM_VALUE 0 old_crtc_state->mode.vscan 0
PARAM_VALUE 0 old_crtc_state->mode.vsync_end 0
PARAM_VALUE 0 old_crtc_state->mode.vsync_start 0
PARAM_VALUE 0 old_crtc_state->mode.vtotal 1125
PARAM_VALUE 1 new_crtc_state 2498530225741430784
PARAM_VALUE 1 new_crtc_state->mode.clock 148500
PARAM_VALUE 1 new_crtc_state->mode.hdisplay 1920
PARAM_VALUE 1 new_crtc_state->mode.hskew 0
PARAM_VALUE 1 new_crtc_state->mode.hsync_end 0
PARAM_VALUE 1 new_crtc_state->mode.hsync_start 0
PARAM_VALUE 1 new_crtc_state->mode.htotal 2200
PARAM_VALUE 1 new_crtc_state->mode.vdisplay 1080
PARAM_VALUE 1 new_crtc_state->mode.vscan 0
PARAM_VALUE 1 new_crtc_state->mode.vsync_end 0
PARAM_VALUE 1 new_crtc_state->mode.vsync_start 0
PARAM_VALUE 1 new_crtc_state->mode.vtotal 1125

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/tests/amdgpu_dm_freesync_test.c dm_test_timing_unchanged_null_args() -> amdgpu_dm_is_timing_unchanged_for_freesync()

Type Parameter Key Value
PARAM_VALUE 0 old_crtc_state 0
PARAM_VALUE 1 new_crtc_state 3022293445039378432
PARAM_VALUE 1 new_crtc_state->mode.clock 0
PARAM_VALUE 1 new_crtc_state->mode.hdisplay 0
PARAM_VALUE 1 new_crtc_state->mode.hskew 0
PARAM_VALUE 1 new_crtc_state->mode.hsync_end 0
PARAM_VALUE 1 new_crtc_state->mode.hsync_start 0
PARAM_VALUE 1 new_crtc_state->mode.htotal 0
PARAM_VALUE 1 new_crtc_state->mode.vdisplay 0
PARAM_VALUE 1 new_crtc_state->mode.vscan 0
PARAM_VALUE 1 new_crtc_state->mode.vsync_end 0
PARAM_VALUE 1 new_crtc_state->mode.vsync_start 0
PARAM_VALUE 1 new_crtc_state->mode.vtotal 0

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/tests/amdgpu_dm_freesync_test.c dm_test_timing_unchanged_null_args() -> amdgpu_dm_is_timing_unchanged_for_freesync()

Type Parameter Key Value
PARAM_VALUE 0 old_crtc_state 3022293445039378432
PARAM_VALUE 0 old_crtc_state->mode.clock 0
PARAM_VALUE 0 old_crtc_state->mode.hdisplay 0
PARAM_VALUE 0 old_crtc_state->mode.hskew 0
PARAM_VALUE 0 old_crtc_state->mode.hsync_end 0
PARAM_VALUE 0 old_crtc_state->mode.hsync_start 0
PARAM_VALUE 0 old_crtc_state->mode.htotal 0
PARAM_VALUE 0 old_crtc_state->mode.vdisplay 0
PARAM_VALUE 0 old_crtc_state->mode.vscan 0
PARAM_VALUE 0 old_crtc_state->mode.vsync_end 0
PARAM_VALUE 0 old_crtc_state->mode.vsync_start 0
PARAM_VALUE 0 old_crtc_state->mode.vtotal 0
PARAM_VALUE 1 new_crtc_state 0

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/tests/amdgpu_dm_freesync_test.c dm_test_timing_unchanged_vrr_shift() -> amdgpu_dm_is_timing_unchanged_for_freesync()

Type Parameter Key Value
PARAM_VALUE 0 old_crtc_state 865511765908406272
PARAM_VALUE 0 old_crtc_state->mode.clock 148500
PARAM_VALUE 0 old_crtc_state->mode.hdisplay 1920
PARAM_VALUE 0 old_crtc_state->mode.hskew 0
PARAM_VALUE 0 old_crtc_state->mode.hsync_end 2052
PARAM_VALUE 0 old_crtc_state->mode.hsync_start 2008
PARAM_VALUE 0 old_crtc_state->mode.htotal 2200
PARAM_VALUE 0 old_crtc_state->mode.vdisplay 1080
PARAM_VALUE 0 old_crtc_state->mode.vscan 0
PARAM_VALUE 0 old_crtc_state->mode.vsync_end 1089
PARAM_VALUE 0 old_crtc_state->mode.vsync_start 1084
PARAM_VALUE 0 old_crtc_state->mode.vtotal 1125
PARAM_VALUE 1 new_crtc_state 2580571784642928640
PARAM_VALUE 1 new_crtc_state->mode.clock 148500
PARAM_VALUE 1 new_crtc_state->mode.hdisplay 1920
PARAM_VALUE 1 new_crtc_state->mode.hskew 0
PARAM_VALUE 1 new_crtc_state->mode.hsync_end 2052
PARAM_VALUE 1 new_crtc_state->mode.hsync_start 2008
PARAM_VALUE 1 new_crtc_state->mode.htotal 2200
PARAM_VALUE 1 new_crtc_state->mode.vdisplay 1080
PARAM_VALUE 1 new_crtc_state->mode.vscan 0
PARAM_VALUE 1 new_crtc_state->mode.vsync_end 1214
PARAM_VALUE 1 new_crtc_state->mode.vsync_start 1209
PARAM_VALUE 1 new_crtc_state->mode.vtotal 1250

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c dm_update_crtc_state() -> amdgpu_dm_is_timing_unchanged_for_freesync()

Type Parameter Key Value
PARAM_VALUE 0 old_crtc_state 4096-ptr_max
DATA_SOURCE 0 old_crtc_state $4
DATA_SOURCE 1 new_crtc_state $3

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c dm_update_crtc_state() -> amdgpu_dm_is_timing_unchanged_for_freesync()

Type Parameter Key Value
PARAM_VALUE 0 old_crtc_state 4096-ptr_max
DATA_SOURCE 0 old_crtc_state $4
DATA_SOURCE 1 new_crtc_state $3