| PARAM_VALUE |
0 |
old_crtc_state |
4096-ptr_max |
| PARAM_VALUE |
0 |
old_crtc_state->uapi.crtc |
4096-ptr_max |
| CAPPED_DATA |
0 |
old_crtc_state->cpu_transcoder |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->double_wide |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.compressed_bpp_x16 |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.compression_enable |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.bits_per_component |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.block_pred_enable |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.convert_rgb |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.final_offset |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.first_line_bpg_offset |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.flatness_max_qp |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.flatness_min_qp |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.initial_dec_delay |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.initial_offset |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.initial_scale_value |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.initial_xmit_delay |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.line_buf_depth |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.native_420 |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.native_422 |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.nfl_bpg_offset |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.nsl_bpg_offset |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.pic_height |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.pic_width |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.rc_model_size |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.rc_quant_incr_limit0 |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.rc_quant_incr_limit1 |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.scale_decrement_interval |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.scale_increment_interval |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.second_line_bpg_offset |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.simple_422 |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.slice_bpg_offset |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.slice_chunk_size |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.slice_height |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.slice_width |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.config.vbr_enable |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsc.slice_config.streams_per_pipe |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsi_pll.ctrl |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->dsi_pll.div |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->enhanced_framing |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->fdi_lanes |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->fdi_m_n.data_m |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->fdi_m_n.data_n |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->fdi_m_n.link_m |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->fdi_m_n.link_n |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->fdi_m_n.tu |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->fec_enable |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->framestart_delay |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->gmch_pfit.control |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->gmch_pfit.lvds_border_bits |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->has_hdmi_sink |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->has_infoframe |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->has_pch_encoder |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hdmi_high_tmds_clock_ratio |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hdmi_scrambling |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hw.active |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hw.adjusted_mode.crtc_hblank_end |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hw.adjusted_mode.crtc_hblank_start |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hw.adjusted_mode.crtc_hdisplay |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hw.adjusted_mode.crtc_hsync_end |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hw.adjusted_mode.crtc_hsync_start |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hw.adjusted_mode.crtc_htotal |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hw.adjusted_mode.crtc_vdisplay |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hw.enable |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hw.pipe_mode.crtc_hblank_end |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hw.pipe_mode.crtc_hblank_start |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hw.pipe_mode.crtc_hdisplay |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hw.pipe_mode.crtc_hsync_end |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hw.pipe_mode.crtc_hsync_start |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hw.pipe_mode.crtc_htotal |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->hw.pipe_mode.crtc_vdisplay |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->infoframes.gcp |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->infoframes.vsc.bpc |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->infoframes.vsc.colorimetry |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->infoframes.vsc.content_type |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->infoframes.vsc.dynamic_range |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->infoframes.vsc.pixelformat |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->joiner_pipes |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->lane_count |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->lane_lat_optim_mask |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->master_transcoder |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->min_hblank |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->min_voltage_level |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->msa_timing_delay |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->mst_master_transcoder |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->output_format |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->output_types |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->pch_pfit.force_thru |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->pixel_multiplier |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->port_clock |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->set_context_latency |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->splitter.enable |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->splitter.link_count |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->splitter.pixel_overlap |
1 |
| CAPPED_DATA |
0 |
old_crtc_state->sync_mode_slaves_mask |
1 |
| DATA_SOURCE |
0 |
old_crtc_state |
$0 |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| HALF_LOCKED2 |
|
&_state->dev->mode_config.connection_mutex |
|
| HALF_LOCKED2 |
|
&_state->dev->mode_config.connection_mutex.mutex |
|
| HALF_LOCKED2 |
|
&client->modeset_mutex |
|
| HALF_LOCKED2 |
|
&dev->mode_config.connection_mutex |
|
| HALF_LOCKED2 |
|
&dev->mode_config.connection_mutex.mutex |
|