| PARAM_VALUE |
0 |
ae4 |
4096-ptr_max |
| PARAM_VALUE |
0 |
ae4->ae4_msix |
4096-ptr_max |
| PARAM_VALUE |
0 |
ae4->ae4_msix->msix_count |
16 |
| PARAM_VALUE |
0 |
ae4->pt.dev |
4096-ptr_max |
| PARAM_VALUE |
0 |
ae4->pt.dev->devres_head.prev |
0 |
| PARAM_VALUE |
0 |
ae4->pt.io_regs |
1-u64max |
| PARAM_VALUE |
0 |
ae4->pt.ver |
4 |
| PARAM_VALUE |
0 |
*ae4->ae4_irq |
0-4294967295 |
| BUF_SIZE |
0 |
ae4 |
16768 |
| BUF_SIZE |
0 |
ae4->ae4_msix |
132 |
| DATA_SOURCE |
0 |
ae4 |
r devm_kzalloc |
| MEM_ZERO |
0 |
ae4 |
|
| MEM_ZERO |
0 |
ae4->ae4_msix |
|
| MEM_ZERO |
0 |
ae4->pt.cmd.next |
|
| MEM_ZERO |
0 |
ae4->pt.cmd.prev |
|
| MEM_ZERO |
0 |
ae4->pt.cmd_q.dma_pool |
|
| MEM_ZERO |
0 |
ae4->pt.cmd_q.pt |
|
| MEM_ZERO |
0 |
ae4->pt.cmd_q.qbase |
|
| MEM_ZERO |
0 |
ae4->pt.cmd_q.reg_control |
|
| MEM_ZERO |
0 |
ae4->pt.dev |
|
| MEM_ZERO |
0 |
ae4->pt.dev_vdata |
|
| MEM_ZERO |
0 |
ae4->pt.dma_desc_cache |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.chan_ida.xa.xa_head |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.channels.next |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.channels.prev |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.dbg_dev_root |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.dbg_summary_show |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.dev |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_alloc_chan_resources |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_caps |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_config |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_free_chan_resources |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_issue_pending |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_pause |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_prep_config_sg |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_prep_dma_cyclic |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_prep_dma_interrupt |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_prep_dma_memcpy |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_prep_dma_memset |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_prep_dma_memset_sg |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_prep_dma_pq |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_prep_dma_pq_val |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_prep_dma_xor |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_prep_dma_xor_val |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_prep_interleaved_dma |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_prep_peripheral_dma_vec |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_prep_slave_sg |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_release |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_resume |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_router_config |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_synchronize |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_terminate_all |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.device_tx_status |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.filter.fn |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.filter.map |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.global_node.next |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.global_node.prev |
|
| MEM_ZERO |
0 |
ae4->pt.dma_dev.owner |
|
| MEM_ZERO |
0 |
ae4->pt.entry.next |
|
| MEM_ZERO |
0 |
ae4->pt.entry.prev |
|
| MEM_ZERO |
0 |
ae4->pt.io_regs |
|
| MEM_ZERO |
0 |
ae4->pt.lsb_queue.head.next |
|
| MEM_ZERO |
0 |
ae4->pt.lsb_queue.head.prev |
|
| MEM_ZERO |
0 |
ae4->pt.name |
|
| MEM_ZERO |
0 |
ae4->pt.pt_dma_chan |
|
| MEM_ZERO |
0 |
ae4->pt.pt_msix |
|
| MEM_ZERO |
0 |
ae4->pt.tdata.cmd |
|
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|