Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c __mvpp2_prs_mac_da_accept() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->prs_shadow 4096-ptr_max
PARAM_VALUE 1 pe 1703818470059278336
PARAM_VALUE 2 tid 112-191
DATA_SOURCE 2 tid r mvpp2_prs_mac_da_range_find
MEM_ZERO 1 pe
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 bh
HALF_LOCKED2 &port->priv->prs_spinlock
HALF_LOCKED2 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c __mvpp2_prs_mac_promisc_set() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->bm_pools->id 0-63
PARAM_VALUE 0 priv->bm_pools->size 0,16352
PARAM_VALUE 0 priv->bm_pools->size_bytes 0,130816,261632
PARAM_VALUE 0 priv->max_port_rxqs 0,8,32
PARAM_VALUE 0 priv->nthreads 0-9
PARAM_VALUE 0 priv->prs_shadow 4096-ptr_max
PARAM_VALUE 0 priv->prs_spinlock.rlock.dep_map->name 0-255
PARAM_VALUE 1 pe 5802253647233675264
PARAM_VALUE 2 tid 253-254
BUF_SIZE 0 priv->aggr_txqs (-1),504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->prs_double_vlans (-1),100
BUF_SIZE 0 priv->prs_shadow (-1),5120
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
DATA_SOURCE 0 priv $0
FUZZY_MAX 0 priv->max_port_rxqs 32
FUZZY_MAX 2 tid 254
BIT_INFO 2 tid 0xfc,0xff
HARD_MAX 2 tid 254
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_def_flow() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->prs_shadow 4096-ptr_max
PARAM_VALUE 0 priv->prs_spinlock.rlock.dep_map->name 0-255
PARAM_VALUE 1 pe 8491537561043218432
PARAM_VALUE 2 tid 0-255
DATA_SOURCE 2 tid r mvpp2_prs_flow_find
MEM_ZERO 1 pe
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
HALF_LOCKED2 global &rtnl_mutex
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_double_vlan_add() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->aggr_txqs 4096-ptr_max
PARAM_VALUE 0 priv->bm_pools 1-u64max
PARAM_VALUE 0 priv->bm_pools->buf_num 0
PARAM_VALUE 0 priv->bm_pools->buf_size 0
PARAM_VALUE 0 priv->bm_pools->dma_addr 0
PARAM_VALUE 0 priv->bm_pools->frag_size 0
PARAM_VALUE 0 priv->bm_pools->id 0
PARAM_VALUE 0 priv->bm_pools->pkt_size 0
PARAM_VALUE 0 priv->bm_pools->port_map 0
PARAM_VALUE 0 priv->bm_pools->size 0
PARAM_VALUE 0 priv->bm_pools->size_bytes 0
PARAM_VALUE 0 priv->bm_pools->virt_addr 0
PARAM_VALUE 0 priv->iface_base 4096-ptr_max
PARAM_VALUE 0 priv->max_port_rxqs 8,32
PARAM_VALUE 0 priv->nthreads 0-9
PARAM_VALUE 0 priv->prs_double_vlans 4096-ptr_max
PARAM_VALUE 0 priv->prs_shadow 4096-ptr_max
PARAM_VALUE 0 priv->prs_spinlock.rlock.dep_map->name 0-255
PARAM_VALUE 0 priv->swth_base 4096-ptr_max
PARAM_VALUE 1 pe 4086510890966097920
PARAM_VALUE 1 pe->index 0-111
PARAM_VALUE 2 tid 1-111
BUF_SIZE 0 priv->aggr_txqs 504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->prs_double_vlans 100
BUF_SIZE 0 priv->prs_shadow 5120
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
CAPPED_DATA 0 priv->nthreads 1
DATA_SOURCE 0 priv $0
FUZZY_MAX 0 priv->max_port_rxqs 32
FUZZY_MAX 2 tid 111
BIT_INFO 0 priv->max_port_rxqs 0x0,0x28
HARD_MAX 0 priv->max_port_rxqs 32
HARD_MAX 2 tid 111
MEM_ZERO 0 priv->aggr_txqs
MEM_ZERO 0 priv->prs_double_vlans
MEM_ZERO 0 priv->prs_shadow
MEM_ZERO 1 pe
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_double_vlan_add() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->aggr_txqs 4096-ptr_max
PARAM_VALUE 0 priv->bm_pools 1-u64max
PARAM_VALUE 0 priv->bm_pools->buf_num 0
PARAM_VALUE 0 priv->bm_pools->buf_size 0
PARAM_VALUE 0 priv->bm_pools->dma_addr 0
PARAM_VALUE 0 priv->bm_pools->frag_size 0
PARAM_VALUE 0 priv->bm_pools->id 0
PARAM_VALUE 0 priv->bm_pools->pkt_size 0
PARAM_VALUE 0 priv->bm_pools->port_map 0
PARAM_VALUE 0 priv->bm_pools->size 0
PARAM_VALUE 0 priv->bm_pools->size_bytes 0
PARAM_VALUE 0 priv->bm_pools->virt_addr 0
PARAM_VALUE 0 priv->iface_base 4096-ptr_max
PARAM_VALUE 0 priv->max_port_rxqs 8,32
PARAM_VALUE 0 priv->nthreads 0-9
PARAM_VALUE 0 priv->prs_double_vlans 1-u64max
PARAM_VALUE 0 priv->prs_shadow 4096-ptr_max
PARAM_VALUE 0 priv->prs_spinlock.rlock.dep_map->name 0-255
PARAM_VALUE 0 priv->swth_base 4096-ptr_max
PARAM_VALUE 1 pe 4086510890966097920
PARAM_VALUE 2 tid 1-111
BUF_SIZE 0 priv->aggr_txqs 504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->prs_double_vlans 100
BUF_SIZE 0 priv->prs_shadow 5120
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
CAPPED_DATA 0 priv->nthreads 1
DATA_SOURCE 0 priv $0
DATA_SOURCE 2 tid r mvpp2_prs_double_vlan_find
FUZZY_MAX 0 priv->max_port_rxqs 32
BIT_INFO 0 priv->max_port_rxqs 0x0,0x28
HARD_MAX 0 priv->max_port_rxqs 32
MEM_ZERO 0 priv->aggr_txqs
MEM_ZERO 0 priv->prs_double_vlans
MEM_ZERO 0 priv->prs_shadow
MEM_ZERO 1 pe
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_double_vlan_find() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->aggr_txqs 4096-ptr_max
PARAM_VALUE 0 priv->bm_pools 1-u64max
PARAM_VALUE 0 priv->bm_pools->buf_num 0
PARAM_VALUE 0 priv->bm_pools->buf_size 0
PARAM_VALUE 0 priv->bm_pools->dma_addr 0
PARAM_VALUE 0 priv->bm_pools->frag_size 0
PARAM_VALUE 0 priv->bm_pools->id 0
PARAM_VALUE 0 priv->bm_pools->pkt_size 0
PARAM_VALUE 0 priv->bm_pools->port_map 0
PARAM_VALUE 0 priv->bm_pools->size 0
PARAM_VALUE 0 priv->bm_pools->size_bytes 0
PARAM_VALUE 0 priv->bm_pools->virt_addr 0
PARAM_VALUE 0 priv->iface_base 4096-ptr_max
PARAM_VALUE 0 priv->max_port_rxqs 8,32
PARAM_VALUE 0 priv->nthreads 0-9
PARAM_VALUE 0 priv->prs_double_vlans 1-u64max
PARAM_VALUE 0 priv->prs_shadow 4096-ptr_max
PARAM_VALUE 0 priv->prs_spinlock.rlock.dep_map->name 0-255
PARAM_VALUE 0 priv->swth_base 4096-ptr_max
PARAM_VALUE 1 pe 9018762966264573952
PARAM_VALUE 2 tid 1-111
BUF_SIZE 0 priv->aggr_txqs 504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->prs_double_vlans 100
BUF_SIZE 0 priv->prs_shadow 5120
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
CAPPED_DATA 0 priv->nthreads 1
DATA_SOURCE 0 priv $0
FUZZY_MAX 0 priv->max_port_rxqs 32
FUZZY_MAX 2 tid 111
BIT_INFO 0 priv->max_port_rxqs 0x0,0x28
HARD_MAX 0 priv->max_port_rxqs 32
HARD_MAX 2 tid 111
MEM_ZERO 0 priv->prs_double_vlans
MEM_ZERO 0 priv->prs_shadow
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_dsa_tag_ethertype_set() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->aggr_txqs 4096-ptr_max
PARAM_VALUE 0 priv->bm_pools 1-u64max
PARAM_VALUE 0 priv->bm_pools->buf_num 0
PARAM_VALUE 0 priv->bm_pools->buf_size 0
PARAM_VALUE 0 priv->bm_pools->dma_addr 0
PARAM_VALUE 0 priv->bm_pools->frag_size 0
PARAM_VALUE 0 priv->bm_pools->id 0
PARAM_VALUE 0 priv->bm_pools->pkt_size 0
PARAM_VALUE 0 priv->bm_pools->port_map 0
PARAM_VALUE 0 priv->bm_pools->size 0
PARAM_VALUE 0 priv->bm_pools->size_bytes 0
PARAM_VALUE 0 priv->bm_pools->virt_addr 0
PARAM_VALUE 0 priv->iface_base 4096-ptr_max
PARAM_VALUE 0 priv->max_port_rxqs 8,32
PARAM_VALUE 0 priv->nthreads 0-9
PARAM_VALUE 0 priv->prs_double_vlans 1-u64max
PARAM_VALUE 0 priv->prs_shadow 4096-ptr_max
PARAM_VALUE 0 priv->prs_spinlock.rlock.dep_map->name 0-255
PARAM_VALUE 0 priv->swth_base 4096-ptr_max
PARAM_VALUE 1 pe 4352005569347919872
PARAM_VALUE 2 tid 239-242
BUF_SIZE 0 priv->aggr_txqs 504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->prs_double_vlans 100
BUF_SIZE 0 priv->prs_shadow 5120
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
CAPPED_DATA 0 priv->nthreads 1
DATA_SOURCE 0 priv $0
FUZZY_MAX 0 priv->max_port_rxqs 32
FUZZY_MAX 2 tid 242
BIT_INFO 0 priv->max_port_rxqs 0x0,0x28
BIT_INFO 2 tid 0xe0,0xff
HARD_MAX 0 priv->max_port_rxqs 32
HARD_MAX 2 tid 242
MEM_ZERO 0 priv->aggr_txqs
MEM_ZERO 0 priv->prs_double_vlans
MEM_ZERO 0 priv->prs_shadow
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_dsa_tag_set() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->bm_pools->id 0-63
PARAM_VALUE 0 priv->bm_pools->size 0,16352
PARAM_VALUE 0 priv->bm_pools->size_bytes 0,130816,261632
PARAM_VALUE 0 priv->max_port_rxqs 0,8,32
PARAM_VALUE 0 priv->nthreads 0-9
PARAM_VALUE 0 priv->prs_shadow 4096-ptr_max
PARAM_VALUE 0 priv->prs_spinlock.rlock.dep_map->name 0-255
PARAM_VALUE 1 pe 4953152220360962048
PARAM_VALUE 2 tid 235-238
BUF_SIZE 0 priv->aggr_txqs (-1),504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->prs_double_vlans (-1),100
BUF_SIZE 0 priv->prs_shadow (-1),5120
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
DATA_SOURCE 0 priv $0
FUZZY_MAX 0 priv->max_port_rxqs 32
FUZZY_MAX 2 tid 238
BIT_INFO 2 tid 0xe8,0xef
HARD_MAX 2 tid 238
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_flow_find() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->prs_shadow 4096-ptr_max
PARAM_VALUE 0 priv->prs_spinlock.rlock.dep_map->name 0-255
PARAM_VALUE 1 pe 159599913614843904
PARAM_VALUE 2 tid 0-255
DATA_SOURCE 0 priv $0
HARD_MAX 2 tid 255
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_init_from_hw() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->prs_spinlock.rlock.dep_map->name 0-255
PARAM_VALUE 1 pe 1422583832263622656,1779426418352922624,3404577814433529856,3602134334304538624,4424965409461784576,7359986924394139648,8506980117065396224
DATA_SOURCE 0 priv $0
DATA_SOURCE 1 pe $1
DATA_SOURCE 2 tid $2
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
LOCK2 &s->lock
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock
TYPE_LOCK (struct seq_file)->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_mac_da_range_find() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->prs_shadow 4096-ptr_max
PARAM_VALUE 1 pe 5778497669275910144
PARAM_VALUE 2 tid 112-191
DATA_SOURCE 0 priv $0
FUZZY_MAX 2 tid 191
HARD_MAX 2 tid 191
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 bh
HALF_LOCKED2 &port->priv->prs_spinlock
HALF_LOCKED2 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_mac_del_all() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->prs_shadow 4096-ptr_max
PARAM_VALUE 0 priv->prs_spinlock.rlock.dep_map->name 0-255
PARAM_VALUE 1 pe 5164561643033214976
PARAM_VALUE 2 tid 112-191
FUZZY_MAX 2 tid 191
HARD_MAX 2 tid 191
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
HALF_LOCKED2 &dev->addr_list_lock
HALF_LOCKED2 global &rtnl_mutex
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_mac_drop_all_set() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->aggr_txqs 4096-ptr_max
PARAM_VALUE 0 priv->bm_pools 1-u64max
PARAM_VALUE 0 priv->bm_pools->buf_num 0
PARAM_VALUE 0 priv->bm_pools->buf_size 0
PARAM_VALUE 0 priv->bm_pools->dma_addr 0
PARAM_VALUE 0 priv->bm_pools->frag_size 0
PARAM_VALUE 0 priv->bm_pools->id 0
PARAM_VALUE 0 priv->bm_pools->pkt_size 0
PARAM_VALUE 0 priv->bm_pools->port_map 0
PARAM_VALUE 0 priv->bm_pools->size 0
PARAM_VALUE 0 priv->bm_pools->size_bytes 0
PARAM_VALUE 0 priv->bm_pools->virt_addr 0
PARAM_VALUE 0 priv->iface_base 4096-ptr_max
PARAM_VALUE 0 priv->max_port_rxqs 8,32
PARAM_VALUE 0 priv->nthreads 0-9
PARAM_VALUE 0 priv->prs_double_vlans 1-u64max
PARAM_VALUE 0 priv->prs_shadow 4096-ptr_max
PARAM_VALUE 0 priv->prs_spinlock.rlock.dep_map->name 0-255
PARAM_VALUE 0 priv->swth_base 4096-ptr_max
PARAM_VALUE 1 pe 3879522055080284160
PARAM_VALUE 2 tid 0
BUF_SIZE 0 priv->aggr_txqs 504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->prs_double_vlans 100
BUF_SIZE 0 priv->prs_shadow 5120
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
CAPPED_DATA 0 priv->nthreads 1
DATA_SOURCE 0 priv $0
FUZZY_MAX 0 priv->max_port_rxqs 32
BIT_INFO 0 priv->max_port_rxqs 0x0,0x28
HARD_MAX 0 priv->max_port_rxqs 32
MEM_ZERO 0 priv->aggr_txqs
MEM_ZERO 0 priv->prs_double_vlans
MEM_ZERO 0 priv->prs_shadow
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vid_entry_add() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->prs_spinlock.rlock.dep_map->name 0-255
PARAM_VALUE 1 pe 962073587783770112
PARAM_VALUE 2 tid 0-3006
CAPPED_DATA 2 tid 1
DATA_SOURCE 2 tid r mvpp2_prs_vid_range_find
MEM_ZERO 1 pe
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vid_range_find() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->prs_shadow 4096-ptr_max
PARAM_VALUE 0 priv->prs_spinlock.rlock.dep_map->name 0-255
PARAM_VALUE 1 pe 157958046480334848
PARAM_VALUE 2 tid s32min-3006
CAPPED_DATA 2 tid 1
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &priv->prs_spinlock
LOCK2 bh
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vlan_add() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->aggr_txqs 4096-ptr_max
PARAM_VALUE 0 priv->bm_pools 1-u64max
PARAM_VALUE 0 priv->bm_pools->buf_num 0
PARAM_VALUE 0 priv->bm_pools->buf_size 0
PARAM_VALUE 0 priv->bm_pools->dma_addr 0
PARAM_VALUE 0 priv->bm_pools->frag_size 0
PARAM_VALUE 0 priv->bm_pools->id 0
PARAM_VALUE 0 priv->bm_pools->pkt_size 0
PARAM_VALUE 0 priv->bm_pools->port_map 0
PARAM_VALUE 0 priv->bm_pools->size 0
PARAM_VALUE 0 priv->bm_pools->size_bytes 0
PARAM_VALUE 0 priv->bm_pools->virt_addr 0
PARAM_VALUE 0 priv->iface_base 4096-ptr_max
PARAM_VALUE 0 priv->max_port_rxqs 8,32
PARAM_VALUE 0 priv->nthreads 0-9
PARAM_VALUE 0 priv->prs_double_vlans 1-u64max
PARAM_VALUE 0 priv->prs_shadow 4096-ptr_max
PARAM_VALUE 0 priv->prs_spinlock.rlock.dep_map->name 0-255
PARAM_VALUE 0 priv->swth_base 4096-ptr_max
PARAM_VALUE 1 pe 2522427410274926592
PARAM_VALUE 1 pe->index 0-111
PARAM_VALUE 2 tid 1-111
BUF_SIZE 0 priv->aggr_txqs 504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->prs_double_vlans 100
BUF_SIZE 0 priv->prs_shadow 5120
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
CAPPED_DATA 0 priv->nthreads 1
DATA_SOURCE 0 priv $0
FUZZY_MAX 0 priv->max_port_rxqs 32
BIT_INFO 0 priv->max_port_rxqs 0x0,0x28
HARD_MAX 0 priv->max_port_rxqs 32
HARD_MAX 2 tid 111
MEM_ZERO 0 priv->aggr_txqs
MEM_ZERO 0 priv->prs_double_vlans
MEM_ZERO 0 priv->prs_shadow
MEM_ZERO 1 pe
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vlan_add() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->aggr_txqs 4096-ptr_max
PARAM_VALUE 0 priv->bm_pools 1-u64max
PARAM_VALUE 0 priv->bm_pools->buf_num 0
PARAM_VALUE 0 priv->bm_pools->buf_size 0
PARAM_VALUE 0 priv->bm_pools->dma_addr 0
PARAM_VALUE 0 priv->bm_pools->frag_size 0
PARAM_VALUE 0 priv->bm_pools->id 0
PARAM_VALUE 0 priv->bm_pools->pkt_size 0
PARAM_VALUE 0 priv->bm_pools->port_map 0
PARAM_VALUE 0 priv->bm_pools->size 0
PARAM_VALUE 0 priv->bm_pools->size_bytes 0
PARAM_VALUE 0 priv->bm_pools->virt_addr 0
PARAM_VALUE 0 priv->iface_base 4096-ptr_max
PARAM_VALUE 0 priv->max_port_rxqs 8,32
PARAM_VALUE 0 priv->nthreads 0-9
PARAM_VALUE 0 priv->prs_double_vlans 1-u64max
PARAM_VALUE 0 priv->prs_shadow 4096-ptr_max
PARAM_VALUE 0 priv->prs_spinlock.rlock.dep_map->name 0-255
PARAM_VALUE 0 priv->swth_base 4096-ptr_max
PARAM_VALUE 1 pe 2522427410274926592
PARAM_VALUE 2 tid 1-111
BUF_SIZE 0 priv->aggr_txqs 504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->prs_double_vlans 100
BUF_SIZE 0 priv->prs_shadow 5120
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
CAPPED_DATA 0 priv->nthreads 1
DATA_SOURCE 0 priv $0
DATA_SOURCE 2 tid r mvpp2_prs_vlan_find
FUZZY_MAX 0 priv->max_port_rxqs 32
BIT_INFO 0 priv->max_port_rxqs 0x0,0x28
HARD_MAX 0 priv->max_port_rxqs 32
MEM_ZERO 0 priv->aggr_txqs
MEM_ZERO 0 priv->prs_double_vlans
MEM_ZERO 0 priv->prs_shadow
MEM_ZERO 1 pe
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vlan_find() -> __mvpp2_prs_init_from_hw()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->aggr_txqs 4096-ptr_max
PARAM_VALUE 0 priv->bm_pools 1-u64max
PARAM_VALUE 0 priv->bm_pools->buf_num 0
PARAM_VALUE 0 priv->bm_pools->buf_size 0
PARAM_VALUE 0 priv->bm_pools->dma_addr 0
PARAM_VALUE 0 priv->bm_pools->frag_size 0
PARAM_VALUE 0 priv->bm_pools->id 0
PARAM_VALUE 0 priv->bm_pools->pkt_size 0
PARAM_VALUE 0 priv->bm_pools->port_map 0
PARAM_VALUE 0 priv->bm_pools->size 0
PARAM_VALUE 0 priv->bm_pools->size_bytes 0
PARAM_VALUE 0 priv->bm_pools->virt_addr 0
PARAM_VALUE 0 priv->iface_base 4096-ptr_max
PARAM_VALUE 0 priv->max_port_rxqs 8,32
PARAM_VALUE 0 priv->nthreads 0-9
PARAM_VALUE 0 priv->prs_double_vlans 1-u64max
PARAM_VALUE 0 priv->prs_shadow 4096-ptr_max
PARAM_VALUE 0 priv->prs_spinlock.rlock.dep_map->name 0-255
PARAM_VALUE 0 priv->swth_base 4096-ptr_max
PARAM_VALUE 1 pe 1151596557461618688
PARAM_VALUE 2 tid 1-111
BUF_SIZE 0 priv->aggr_txqs 504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->prs_double_vlans 100
BUF_SIZE 0 priv->prs_shadow 5120
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
CAPPED_DATA 0 priv->nthreads 1
DATA_SOURCE 0 priv $0
FUZZY_MAX 0 priv->max_port_rxqs 32
FUZZY_MAX 2 tid 111
BIT_INFO 0 priv->max_port_rxqs 0x0,0x28
HARD_MAX 0 priv->max_port_rxqs 32
HARD_MAX 2 tid 111
MEM_ZERO 0 priv->prs_double_vlans
MEM_ZERO 0 priv->prs_shadow
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock