Defined in 1 files as a function:
Referenced in 1 files:
Smatch caller information:
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_assoc_cmac_tbl() -> __get_sta_he_pkt_padding()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->acam_num | 32,128 |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bbmcu_nr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->bcam_num | 10,16,20 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->disable_cpu | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->fwdl_enable_wcpu | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->wow_reason_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->pause | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->delays->blkio_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->sched_task_group->idle | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->pci_info->gen_def | 1514654105865453568,7955639482977693696 |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-2 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->bc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->crc | 0-u16max |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->idx | 0-255 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->mc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->r_w | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->skip_mac_hdr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->uc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->valid | 0-1 |
| PARAM_VALUE | 1 | link_sta | 4096-ptr_max |
| PARAM_VALUE | 1 | link_sta->he_cap.has_he | 1 |
| PARAM_VALUE | 2 | pads | 6508506589721718784 |
| BUF_SIZE | 1 | link_sta | (-1),272 |
| BUF_SIZE | 1 | link_sta | (-1),272 |
| BUF_SIZE | 2 | pads | 5 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | link_sta | r __rtw89_sta_rcu_dereference_link |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | rcu_read | ||
| HALF_LOCKED2 | global &rtnl_mutex |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_assoc_cmac_tbl_be() -> __get_sta_he_pkt_padding()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->acam_num | 32,128 |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bbmcu_nr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->bcam_num | 10,16,20 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->disable_cpu | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->fwdl_enable_wcpu | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->wow_reason_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->pause | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->delays->blkio_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->sched_task_group->idle | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->pci_info->gen_def | 1514654105865453568,7955639482977693696 |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-2 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->bc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->crc | 0-u16max |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->idx | 0-255 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->mc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->r_w | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->skip_mac_hdr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->uc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->valid | 0-1 |
| PARAM_VALUE | 1 | link_sta | 4096-ptr_max |
| PARAM_VALUE | 1 | link_sta->eht_cap.has_eht | 0 |
| PARAM_VALUE | 1 | link_sta->he_cap.has_he | 1 |
| PARAM_VALUE | 2 | pads | 7294637255562170368 |
| BUF_SIZE | 1 | link_sta | (-1),272 |
| BUF_SIZE | 1 | link_sta | (-1),272 |
| BUF_SIZE | 2 | pads | 5 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | link_sta | r __rtw89_sta_rcu_dereference_link |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | rcu_read | ||
| HALF_LOCKED2 | global &rtnl_mutex |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_assoc_cmac_tbl_g7() -> __get_sta_he_pkt_padding()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->acam_num | 32,128 |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bbmcu_nr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->bcam_num | 10,16,20 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->disable_cpu | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->fwdl_enable_wcpu | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->wow_reason_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->pause | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->delays->blkio_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->sched_task_group->idle | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->pci_info->gen_def | 1514654105865453568,7955639482977693696 |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-2 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->bc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->crc | 0-u16max |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->idx | 0-255 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->mc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->r_w | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->skip_mac_hdr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->uc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->valid | 0-1 |
| PARAM_VALUE | 1 | link_sta | 4096-ptr_max |
| PARAM_VALUE | 1 | link_sta->eht_cap.has_eht | 0 |
| PARAM_VALUE | 1 | link_sta->he_cap.has_he | 1 |
| PARAM_VALUE | 2 | pads | 6044792764087386112 |
| BUF_SIZE | 1 | link_sta | (-1),272 |
| BUF_SIZE | 1 | link_sta | (-1),272 |
| BUF_SIZE | 2 | pads | 5 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | link_sta | r __rtw89_sta_rcu_dereference_link |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | rcu_read | ||
| HALF_LOCKED2 | global &rtnl_mutex |