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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/i915/gt/intel_rps.c gen5_rps_disable() -> __gen5_rps_set()

Type Parameter Key Value
PARAM_VALUE 0 rps 4096-ptr_max
DATA_SOURCE 0 rps $0
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 rps->boost_freq 0-255
HOST_DATA 0 rps->cur_freq 0-254
HOST_DATA 0 rps->efficient_freq 0-255
HOST_DATA 0 rps->idle_freq 0-255
HOST_DATA 0 rps->ips.corr 0-255
HOST_DATA 0 rps->ips.last_count1 0-12884901885
HOST_DATA 0 rps->ips.last_count2 0-u32max
HOST_DATA 0 rps->max_freq 0-255
HOST_DATA 0 rps->max_freq_softlimit 0-255
HOST_DATA 0 rps->min_freq 0-255
HOST_DATA 0 rps->min_freq_softlimit 0-255
HOST_DATA 0 rps->rp0_freq 0-255
HOST_DATA 0 rps->rp1_freq 0-255
HOST_DATA 1 val 0-255
NO_OVERFLOW_SIMPLE 0 rps->last_freq
LOCK2 global &mchdev_lock
LOCK2 irq

drivers/gpu/drm/i915/gt/intel_rps.c gen5_rps_enable() -> __gen5_rps_set()

Type Parameter Key Value
PARAM_VALUE 0 rps 4096-ptr_max
PARAM_VALUE 0 rps->max_freq 1-255
PARAM_VALUE 0 rps->min_freq 0-254
CAPPED_DATA 0 rps->min_freq 1
DATA_SOURCE 0 rps $0
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 rps->boost_freq 0-255
HOST_DATA 0 rps->cur_freq 0-255
HOST_DATA 0 rps->efficient_freq 0-255
HOST_DATA 0 rps->idle_freq 0-255
HOST_DATA 0 rps->ips.corr 0-255
HOST_DATA 0 rps->ips.last_count1 0-12884901885
HOST_DATA 0 rps->ips.last_count2 0-u32max
HOST_DATA 0 rps->max_freq 1-255
HOST_DATA 0 rps->max_freq_softlimit 0-255
HOST_DATA 0 rps->min_freq 0-254
HOST_DATA 0 rps->min_freq_softlimit 0-255
HOST_DATA 0 rps->rp0_freq 0-255
HOST_DATA 0 rps->rp1_freq 0-255
HOST_DATA 1 val 0-255
NO_OVERFLOW_SIMPLE 0 rps->last_freq
LOCK2 global &mchdev_lock
LOCK2 irq
HALF_LOCKED2 __flags

drivers/gpu/drm/i915/gt/intel_rps.c gen5_rps_irq_handler() -> __gen5_rps_set()

Type Parameter Key Value
PARAM_VALUE 0 rps 4096-ptr_max
DATA_SOURCE 0 rps $0
PARAM_COMPARE 1 val != $0->cur_freq
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
LOCK2 global &mchdev_lock
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 _T->lock
HALF_LOCKED2 flags

drivers/gpu/drm/i915/gt/intel_rps.c gen5_rps_set() -> __gen5_rps_set()

Type Parameter Key Value
PARAM_VALUE 0 rps 4096-ptr_max
DATA_SOURCE 0 rps $0
DATA_SOURCE 1 val $1
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 rps->boost_freq 0-255
HOST_DATA 0 rps->cur_freq 0-255
HOST_DATA 0 rps->efficient_freq 0-255
HOST_DATA 0 rps->ei.media_c0 0-u32max
HOST_DATA 0 rps->ei.render_c0 0-u32max
HOST_DATA 0 rps->idle_freq 0-255
HOST_DATA 0 rps->ips.corr 0-255
HOST_DATA 0 rps->ips.last_count1 0-12884901885
HOST_DATA 0 rps->ips.last_count2 0-u32max
HOST_DATA 0 rps->max_freq 1-255
HOST_DATA 0 rps->max_freq_softlimit 0-255
HOST_DATA 0 rps->min_freq 0-254[c]
HOST_DATA 0 rps->min_freq_softlimit 0-255
HOST_DATA 0 rps->rp0_freq 0-255
HOST_DATA 0 rps->rp1_freq 0-255
HOST_DATA 1 val 0-254[c]
USER_DATA 0 rps->max_freq_softlimit 0-255[c]
USER_DATA 0 rps->min_freq_softlimit 0-255[c]
USER_DATA 1 val 1-255[c]
NO_OVERFLOW_SIMPLE 0 rps->max_freq_softlimit
NO_OVERFLOW_SIMPLE 0 rps->min_freq_softlimit
NO_OVERFLOW_SIMPLE 1 val
LOCK2 global &mchdev_lock
LOCK2 irq
HALF_LOCKED2 &wf->mutex
HALF_LOCKED2 0 &rps->lock

drivers/gpu/drm/i915/gt/intel_rps.c i915_gpu_turbo_disable() -> __gen5_rps_set()

Type Parameter Key Value
PARAM_VALUE 0 rps 4096-ptr_max
PREEMPT_ADD <- disables preempt
LOCK2 global &mchdev_lock
LOCK2 irq