Defined in 5 files as a macro:

• drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h, line 5195 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h, line 5307 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h, line 6387 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h, line 7299 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h, line 4661 (as a macro)

Referenced in 6 files:

• drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
  • line 3080
  • line 3083
• drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
  • line 3063
  • line 3066
• drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
  • line 3079
  • line 3082
• drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c
  • line 121
  • line 123
  • line 124
• drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c
  • line 107
  • line 109
  • line 110
• drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c
  • line 98
  • line 100
  • line 101